Home
last modified time | relevance | path

Searched refs:regCP_GFX_RS64_INSTR_PNTR0 (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_5_0_offset.h6881 #define regCP_GFX_RS64_INSTR_PNTR0 … macro
H A Dgc_12_0_0_offset.h5300 #define regCP_GFX_RS64_INSTR_PNTR0 … macro
H A Dgc_11_0_3_offset.h8412 #define regCP_GFX_RS64_INSTR_PNTR0 … macro
H A Dgc_11_0_0_offset.h8108 #define regCP_GFX_RS64_INSTR_PNTR0 … macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v12_0.c117 SOC15_REG_ENTRY_STR(GC, 0, regCP_GFX_RS64_INSTR_PNTR0),