Home
last modified time | relevance | path

Searched refs:regCP_GFX_RS64_DC_BASE0_LO (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v11_0.c2524 WREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_BASE0_LO, in gfx_v11_0_config_pfp_cache_rs64()
3134 WREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_BASE0_LO, in gfx_v11_0_cp_gfx_load_pfp_microcode_rs64()
H A Dgfx_v12_0.c2320 WREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_BASE0_LO, in gfx_v12_0_cp_gfx_load_pfp_microcode_rs64()
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_5_0_offset.h8439 #define regCP_GFX_RS64_DC_BASE0_LO … macro
H A Dgc_12_0_0_offset.h6248 #define regCP_GFX_RS64_DC_BASE0_LO … macro
H A Dgc_11_0_3_offset.h10318 #define regCP_GFX_RS64_DC_BASE0_LO … macro
H A Dgc_11_0_0_offset.h9768 #define regCP_GFX_RS64_DC_BASE0_LO … macro