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Searched refs:regCP_GFX_RS64_DC_BASE0_HI (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v11_0.c2590 WREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_BASE0_HI, in gfx_v11_0_config_pfp_cache_rs64()
3200 WREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_BASE0_HI, in gfx_v11_0_cp_gfx_load_pfp_microcode_rs64()
H A Dgfx_v12_0.c2364 WREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_BASE0_HI, in gfx_v12_0_cp_gfx_load_pfp_microcode_rs64()
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_5_0_offset.h8443 #define regCP_GFX_RS64_DC_BASE0_HI … macro
H A Dgc_12_0_0_offset.h6252 #define regCP_GFX_RS64_DC_BASE0_HI … macro
H A Dgc_11_0_3_offset.h10322 #define regCP_GFX_RS64_DC_BASE0_HI … macro
H A Dgc_11_0_0_offset.h9772 #define regCP_GFX_RS64_DC_BASE0_HI … macro