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Searched refs:regCP_GFX_MQD_BASE_ADDR_HI (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_4_3_offset.h3126 #define regCP_GFX_MQD_BASE_ADDR_HI … macro
H A Dgc_9_4_2_offset.h659 #define regCP_GFX_MQD_BASE_ADDR_HI … macro
H A Dgc_12_0_0_offset.h3682 #define regCP_GFX_MQD_BASE_ADDR_HI … macro
H A Dgc_11_0_3_offset.h4626 #define regCP_GFX_MQD_BASE_ADDR_HI … macro
H A Dgc_11_0_0_offset.h4402 #define regCP_GFX_MQD_BASE_ADDR_HI … macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v12_0.c226 SOC15_REG_ENTRY_STR(GC, 0, regCP_GFX_MQD_BASE_ADDR_HI),