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Searched refs:regCP_GFX_MQD_BASE_ADDR (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_4_3_offset.h3124 #define regCP_GFX_MQD_BASE_ADDR … macro
H A Dgc_9_4_2_offset.h657 #define regCP_GFX_MQD_BASE_ADDR … macro
H A Dgc_11_5_0_offset.h3373 #define regCP_GFX_MQD_BASE_ADDR … macro
H A Dgc_12_0_0_offset.h3680 #define regCP_GFX_MQD_BASE_ADDR … macro
H A Dgc_11_0_3_offset.h4624 #define regCP_GFX_MQD_BASE_ADDR … macro
H A Dgc_11_0_0_offset.h4400 #define regCP_GFX_MQD_BASE_ADDR … macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v12_0.c194 SOC15_REG_ENTRY_STR(GC, 0, regCP_GFX_MQD_BASE_ADDR),
H A Dgfx_v11_0.c235 SOC15_REG_ENTRY_STR(GC, 0, regCP_GFX_MQD_BASE_ADDR),