Searched refs:regCP_DEBUG (Results 1 – 9 of 9) sorted by relevance
| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | gfxhub_v11_5_0.c | 418 tmp = RREG32_SOC15(GC, 0, regCP_DEBUG); in gfxhub_v11_5_0_set_fault_enable_default() 420 WREG32_SOC15(GC, 0, regCP_DEBUG, tmp); in gfxhub_v11_5_0_set_fault_enable_default()
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| H A D | gfxhub_v3_0.c | 415 tmp = RREG32_SOC15(GC, 0, regCP_DEBUG); in gfxhub_v3_0_set_fault_enable_default() 417 WREG32_SOC15(GC, 0, regCP_DEBUG, tmp); in gfxhub_v3_0_set_fault_enable_default()
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| H A D | gfxhub_v12_0.c | 423 tmp = RREG32_SOC15(GC, 0, regCP_DEBUG); in gfxhub_v12_0_set_fault_enable_default() 425 WREG32_SOC15(GC, 0, regCP_DEBUG, tmp); in gfxhub_v12_0_set_fault_enable_default()
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| H A D | gfx_v12_0.c | 129 SOC15_REG_ENTRY_STR(GC, 0, regCP_DEBUG),
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| H A D | gfx_v11_0.c | 173 SOC15_REG_ENTRY_STR(GC, 0, regCP_DEBUG),
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| /linux/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| H A D | gc_9_4_3_offset.h | 2928 #define regCP_DEBUG … macro
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| H A D | gc_12_0_0_offset.h | 3548 #define regCP_DEBUG … macro
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| H A D | gc_11_0_3_offset.h | 4442 #define regCP_DEBUG … macro
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| H A D | gc_11_0_0_offset.h | 4224 #define regCP_DEBUG … macro
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