Home
last modified time | relevance | path

Searched refs:regCPG_UTCL1_STATUS (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_4_3_offset.h3130 #define regCPG_UTCL1_STATUS … macro
H A Dgc_9_4_2_offset.h663 #define regCPG_UTCL1_STATUS … macro
H A Dgc_11_5_0_offset.h3513 #define regCPG_UTCL1_STATUS … macro
H A Dgc_12_0_0_offset.h3820 #define regCPG_UTCL1_STATUS … macro
H A Dgc_11_0_3_offset.h4764 #define regCPG_UTCL1_STATUS … macro
H A Dgc_11_0_0_offset.h4540 #define regCPG_UTCL1_STATUS … macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v9_4_3.c81 SOC15_REG_ENTRY_STR(GC, 0, regCPG_UTCL1_STATUS),
H A Dgfx_v12_0.c99 SOC15_REG_ENTRY_STR(GC, 0, regCPG_UTCL1_STATUS),
H A Dgfx_v11_0.c138 SOC15_REG_ENTRY_STR(GC, 0, regCPG_UTCL1_STATUS),