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Searched refs:regCNVC_CFG2_PRE_REALPHA_BASE_IDX (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h4056 #define regCNVC_CFG2_PRE_REALPHA_BASE_IDX macro
H A Ddcn_3_1_5_offset.h4893 #define regCNVC_CFG2_PRE_REALPHA_BASE_IDX macro
H A Ddcn_3_5_1_offset.h5303 #define regCNVC_CFG2_PRE_REALPHA_BASE_IDX macro
H A Ddcn_3_5_0_offset.h5324 #define regCNVC_CFG2_PRE_REALPHA_BASE_IDX macro
H A Ddcn_3_1_4_offset.h6043 #define regCNVC_CFG2_PRE_REALPHA_BASE_IDX macro
H A Ddcn_3_1_2_offset.h5134 #define regCNVC_CFG2_PRE_REALPHA_BASE_IDX macro
H A Ddcn_3_2_1_offset.h4055 #define regCNVC_CFG2_PRE_REALPHA_BASE_IDX macro
H A Ddcn_3_1_6_offset.h5354 #define regCNVC_CFG2_PRE_REALPHA_BASE_IDX macro
H A Ddcn_4_1_0_offset.h4340 #define regCNVC_CFG2_PRE_REALPHA_BASE_IDX macro