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Searched refs:regCNVC_CFG0_PRE_REALPHA_BASE_IDX (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h3276 #define regCNVC_CFG0_PRE_REALPHA_BASE_IDX macro
H A Ddcn_3_1_5_offset.h3509 #define regCNVC_CFG0_PRE_REALPHA_BASE_IDX macro
H A Ddcn_3_5_1_offset.h4479 #define regCNVC_CFG0_PRE_REALPHA_BASE_IDX macro
H A Ddcn_3_5_0_offset.h4500 #define regCNVC_CFG0_PRE_REALPHA_BASE_IDX macro
H A Ddcn_3_1_4_offset.h4659 #define regCNVC_CFG0_PRE_REALPHA_BASE_IDX macro
H A Ddcn_3_1_2_offset.h3750 #define regCNVC_CFG0_PRE_REALPHA_BASE_IDX macro
H A Ddcn_3_2_1_offset.h3275 #define regCNVC_CFG0_PRE_REALPHA_BASE_IDX macro
H A Ddcn_3_1_6_offset.h3970 #define regCNVC_CFG0_PRE_REALPHA_BASE_IDX macro
H A Ddcn_4_1_0_offset.h3321 #define regCNVC_CFG0_PRE_REALPHA_BASE_IDX macro