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Searched refs:regCM2_CM_POST_CSC_C13_C14_BASE_IDX (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h4152 #define regCM2_CM_POST_CSC_C13_C14_BASE_IDX … macro
H A Ddcn_3_1_5_offset.h4989 #define regCM2_CM_POST_CSC_C13_C14_BASE_IDX … macro
H A Ddcn_3_5_1_offset.h5399 #define regCM2_CM_POST_CSC_C13_C14_BASE_IDX … macro
H A Ddcn_3_5_0_offset.h5420 #define regCM2_CM_POST_CSC_C13_C14_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h6139 #define regCM2_CM_POST_CSC_C13_C14_BASE_IDX … macro
H A Ddcn_3_1_2_offset.h5230 #define regCM2_CM_POST_CSC_C13_C14_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h4151 #define regCM2_CM_POST_CSC_C13_C14_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h5450 #define regCM2_CM_POST_CSC_C13_C14_BASE_IDX … macro
H A Ddcn_4_1_0_offset.h4582 #define regCM2_CM_POST_CSC_C13_C14_BASE_IDX … macro