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Searched refs:regCM1_CM_GAMCOR_RAMA_END_CNTL2_B (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h3841 #define regCM1_CM_GAMCOR_RAMA_END_CNTL2_B … macro
H A Ddcn_3_1_5_offset.h4376 #define regCM1_CM_GAMCOR_RAMA_END_CNTL2_B … macro
H A Ddcn_3_5_1_offset.h5066 #define regCM1_CM_GAMCOR_RAMA_END_CNTL2_B … macro
H A Ddcn_3_5_0_offset.h5087 #define regCM1_CM_GAMCOR_RAMA_END_CNTL2_B … macro
H A Ddcn_3_1_4_offset.h5526 #define regCM1_CM_GAMCOR_RAMA_END_CNTL2_B … macro
H A Ddcn_3_1_2_offset.h4617 #define regCM1_CM_GAMCOR_RAMA_END_CNTL2_B … macro
H A Ddcn_3_2_1_offset.h3840 #define regCM1_CM_GAMCOR_RAMA_END_CNTL2_B … macro
H A Ddcn_3_1_6_offset.h4837 #define regCM1_CM_GAMCOR_RAMA_END_CNTL2_B … macro
H A Ddcn_4_1_0_offset.h4125 #define regCM1_CM_GAMCOR_RAMA_END_CNTL2_B … macro