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Searched refs:regCM0_CM_MEM_PWR_STATUS (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h3575 #define regCM0_CM_MEM_PWR_STATUS … macro
H A Ddcn_3_1_5_offset.h3956 #define regCM0_CM_MEM_PWR_STATUS … macro
H A Ddcn_3_5_1_offset.h4778 #define regCM0_CM_MEM_PWR_STATUS … macro
H A Ddcn_3_5_0_offset.h4799 #define regCM0_CM_MEM_PWR_STATUS … macro
H A Ddcn_3_1_4_offset.h5106 #define regCM0_CM_MEM_PWR_STATUS … macro
H A Ddcn_3_1_2_offset.h4197 #define regCM0_CM_MEM_PWR_STATUS … macro
H A Ddcn_3_2_1_offset.h3574 #define regCM0_CM_MEM_PWR_STATUS … macro
H A Ddcn_3_1_6_offset.h4417 #define regCM0_CM_MEM_PWR_STATUS … macro
H A Ddcn_4_1_0_offset.h3740 #define regCM0_CM_MEM_PWR_STATUS … macro