Home
last modified time | relevance | path

Searched refs:regAZCONTROLLER1_RESPONSE_INTERRUPT_COUNT_BASE_IDX (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_5_1_offset.h15179 #define regAZCONTROLLER1_RESPONSE_INTERRUPT_COUNT_BASE_IDX … macro
H A Ddcn_3_5_0_offset.h15200 #define regAZCONTROLLER1_RESPONSE_INTERRUPT_COUNT_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h15205 #define regAZCONTROLLER1_RESPONSE_INTERRUPT_COUNT_BASE_IDX … macro
H A Ddcn_3_1_2_offset.h198 #define regAZCONTROLLER1_RESPONSE_INTERRUPT_COUNT_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h210 #define regAZCONTROLLER1_RESPONSE_INTERRUPT_COUNT_BASE_IDX … macro
H A Ddcn_4_1_0_offset.h14971 #define regAZCONTROLLER1_RESPONSE_INTERRUPT_COUNT_BASE_IDX … macro