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Searched refs:regAFMT1_AFMT_MEM_PWR_BASE_IDX (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h10320 #define regAFMT1_AFMT_MEM_PWR_BASE_IDX … macro
H A Ddcn_3_1_5_offset.h10893 #define regAFMT1_AFMT_MEM_PWR_BASE_IDX … macro
H A Ddcn_3_5_1_offset.h8333 #define regAFMT1_AFMT_MEM_PWR_BASE_IDX … macro
H A Ddcn_3_5_0_offset.h8354 #define regAFMT1_AFMT_MEM_PWR_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h9527 #define regAFMT1_AFMT_MEM_PWR_BASE_IDX … macro
H A Ddcn_3_1_2_offset.h11142 #define regAFMT1_AFMT_MEM_PWR_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h10319 #define regAFMT1_AFMT_MEM_PWR_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h11366 #define regAFMT1_AFMT_MEM_PWR_BASE_IDX … macro
H A Ddcn_4_1_0_offset.h10808 #define regAFMT1_AFMT_MEM_PWR_BASE_IDX … macro