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Searched refs:regABM3_BL1_PWM_ABM_CNTL (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h7355 #define regABM3_BL1_PWM_ABM_CNTL … macro
H A Ddcn_3_1_5_offset.h7952 #define regABM3_BL1_PWM_ABM_CNTL … macro
H A Ddcn_3_5_1_offset.h13718 #define regABM3_BL1_PWM_ABM_CNTL … macro
H A Ddcn_3_5_0_offset.h13739 #define regABM3_BL1_PWM_ABM_CNTL … macro
H A Ddcn_3_1_4_offset.h15066 #define regABM3_BL1_PWM_ABM_CNTL … macro
H A Ddcn_3_1_2_offset.h8189 #define regABM3_BL1_PWM_ABM_CNTL … macro
H A Ddcn_3_2_1_offset.h7354 #define regABM3_BL1_PWM_ABM_CNTL … macro
H A Ddcn_3_1_6_offset.h8413 #define regABM3_BL1_PWM_ABM_CNTL … macro
H A Ddcn_4_1_0_offset.h8011 #define regABM3_BL1_PWM_ABM_CNTL … macro