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Searched refs:regABM2_BL1_PWM_BL_UPDATE_SAMPLE_RATE (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h7233 #define regABM2_BL1_PWM_BL_UPDATE_SAMPLE_RATE … macro
H A Ddcn_3_1_5_offset.h7830 #define regABM2_BL1_PWM_BL_UPDATE_SAMPLE_RATE … macro
H A Ddcn_3_5_1_offset.h13596 #define regABM2_BL1_PWM_BL_UPDATE_SAMPLE_RATE … macro
H A Ddcn_3_5_0_offset.h13617 #define regABM2_BL1_PWM_BL_UPDATE_SAMPLE_RATE … macro
H A Ddcn_3_1_4_offset.h14944 #define regABM2_BL1_PWM_BL_UPDATE_SAMPLE_RATE … macro
H A Ddcn_3_1_2_offset.h8067 #define regABM2_BL1_PWM_BL_UPDATE_SAMPLE_RATE … macro
H A Ddcn_3_2_1_offset.h7232 #define regABM2_BL1_PWM_BL_UPDATE_SAMPLE_RATE … macro
H A Ddcn_3_1_6_offset.h8291 #define regABM2_BL1_PWM_BL_UPDATE_SAMPLE_RATE … macro
H A Ddcn_4_1_0_offset.h7931 #define regABM2_BL1_PWM_BL_UPDATE_SAMPLE_RATE … macro