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Searched refs:regABM0_BL1_PWM_ABM_CNTL (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h6983 #define regABM0_BL1_PWM_ABM_CNTL … macro
H A Ddcn_3_1_5_offset.h7580 #define regABM0_BL1_PWM_ABM_CNTL … macro
H A Ddcn_3_5_1_offset.h13346 #define regABM0_BL1_PWM_ABM_CNTL … macro
H A Ddcn_3_5_0_offset.h13367 #define regABM0_BL1_PWM_ABM_CNTL … macro
H A Ddcn_3_1_4_offset.h14694 #define regABM0_BL1_PWM_ABM_CNTL … macro
H A Ddcn_3_1_2_offset.h7817 #define regABM0_BL1_PWM_ABM_CNTL … macro
H A Ddcn_3_2_1_offset.h6982 #define regABM0_BL1_PWM_ABM_CNTL … macro
H A Ddcn_3_1_6_offset.h8041 #define regABM0_BL1_PWM_ABM_CNTL … macro
H A Ddcn_4_1_0_offset.h7765 #define regABM0_BL1_PWM_ABM_CNTL … macro