| /linux/drivers/net/ethernet/cavium/thunder/ |
| H A D | thunder_xcv.c | 70 cfg = readq_relaxed(xcv->reg_base + XCV_RESET); in xcv_init_hw() 75 cfg = readq_relaxed(xcv->reg_base + XCV_RESET); in xcv_init_hw() 84 cfg = readq_relaxed(xcv->reg_base + XCV_DLL_CTL); in xcv_init_hw() 92 cfg = readq_relaxed(xcv->reg_base + XCV_RESET); in xcv_init_hw() 95 readq_relaxed(xcv->reg_base + XCV_RESET); in xcv_init_hw() 100 cfg = readq_relaxed(xcv->reg_base + XCV_RESET); in xcv_init_hw() 104 cfg = readq_relaxed(xcv->reg_base + XCV_RESET); in xcv_init_hw() 127 cfg = readq_relaxed(xcv->reg_base + XCV_CTL); in xcv_setup_link() 133 cfg = readq_relaxed(xcv->reg_base + XCV_RESET); in xcv_setup_link() 138 cfg = readq_relaxed(xcv->reg_base + XCV_RESET); in xcv_setup_link() [all …]
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| H A D | thunder_bgx.c | 111 return readq_relaxed(addr); in bgx_reg_read() 125 writeq_relaxed(val | readq_relaxed(addr), addr); in bgx_reg_modify()
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| /linux/include/linux/ |
| H A D | io-64-nonatomic-lo-hi.h | 50 #ifndef readq_relaxed 51 #define readq_relaxed lo_hi_readq_relaxed macro
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| H A D | io-64-nonatomic-hi-lo.h | 50 #ifndef readq_relaxed 51 #define readq_relaxed hi_lo_readq_relaxed macro
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| /linux/drivers/perf/ |
| H A D | marvell_cn10k_ddr_pmu.c | 678 val = readq_relaxed(pmu->base + reg); in cn10k_ddr_perf_counter_enable() 716 return readq_relaxed(pmu->base + in cn10k_ddr_perf_read_counter() 720 return readq_relaxed(pmu->base + in cn10k_ddr_perf_read_counter() 723 val = readq_relaxed(pmu->base + in cn10k_ddr_perf_read_counter() 906 val = readq_relaxed(pmu->base + p_data->cnt_freerun_en); in ddr_pmu_enable_read_freerun() 920 val = readq_relaxed(pmu->base + p_data->cnt_freerun_en); in ddr_pmu_enable_write_freerun() 960 val = readq_relaxed(pmu->base + p_data->cnt_freerun_ctrl); in ddr_pmu_ody_enable_read_freerun() 975 val = readq_relaxed(pmu->base + p_data->cnt_freerun_ctrl); in ddr_pmu_ody_enable_write_freerun()
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| H A D | arm-cmn.c | 1649 reg = readq_relaxed(dtm->base + offset); in arm_cmn_read_dtm() 1660 u64 val = readq_relaxed(pmccntr); in arm_cmn_read_cc() 2461 u64 reg = readq_relaxed(cmn->base + offset + CMN_NODE_INFO); in arm_cmn_init_node_info() 2512 reg = readq_relaxed(cfg_region + CMN_CFGM_PERIPH_ID_01); in arm_cmn_discover() 2545 reg = readq_relaxed(cfg_region + CMN_CFGM_INFO_GLOBAL); in arm_cmn_discover() 2558 reg = readq_relaxed(cfg_region + CMN_CFGM_INFO_GLOBAL_1); in arm_cmn_discover() 2569 reg = readq_relaxed(cfg_region + CMN_CHILD_INFO); in arm_cmn_discover() 2579 reg = readq_relaxed(cfg_region + i * 8); in arm_cmn_discover() 2582 reg = readq_relaxed(xp_region + CMN_CHILD_INFO); in arm_cmn_discover() 2611 reg = readq_relaxed(cfg_region + i * 8); in arm_cmn_discover() [all …]
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| H A D | fujitsu_uncore_pmu.c | 109 new = readq_relaxed(uncorepmu->regs + PM_EVCNTR(idx)); in fujitsu_uncore_counter_update() 136 long status = readq_relaxed(uncorepmu->regs + PM_OVSR); in fujitsu_uncore_handle_irq()
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| H A D | marvell_pem_pmu.c | 231 return readq_relaxed(pmu->base + eventid_to_offset(eventid)); in pem_perf_read_counter()
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| H A D | arm_smmuv3_pmu.c | 899 ceid_64[0] = readq_relaxed(smmu_pmu->reg_base + SMMU_PMCG_CEID0); in smmu_pmu_probe() 900 ceid_64[1] = readq_relaxed(smmu_pmu->reg_base + SMMU_PMCG_CEID1); in smmu_pmu_probe()
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| /linux/arch/riscv/include/asm/ |
| H A D | timex.h | 20 return readq_relaxed(clint_time_val); in get_cycles()
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| H A D | mmio.h | 124 #define readq_relaxed(c) ({ u64 __v; __io_rbr(); __v = readq_cpu(c); __io_rar(); __v; }) macro
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| /linux/arch/alpha/include/asm/ |
| H A D | io.h | 558 extern u64 readq_relaxed(const volatile void __iomem *addr); 562 #define readq_relaxed readq_relaxed macro 585 extern inline u64 readq_relaxed(const volatile void __iomem *addr) in readq_relaxed() function
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| /linux/arch/arm64/kernel/ |
| H A D | acpi_parking_protocol.c | 118 entry_point = readq_relaxed(&mailbox->entry_point); in acpi_parking_protocol_cpu_postboot()
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| /linux/drivers/iommu/arm/arm-smmu/ |
| H A D | arm-smmu-nvidia.c | 81 return readq_relaxed(reg); in nvidia_smmu_read_reg64() 207 iova = readq_relaxed(cb_base + ARM_SMMU_CB_FAR); in nvidia_smmu_context_fault_bank()
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| H A D | arm-smmu-qcom-debug.c | 209 val = readq_relaxed(tbu->base + DEBUG_SID_HALT_REG); in qcom_tbu_trigger_atos() 243 val = readq_relaxed(tbu->base + DEBUG_PAR_REG); in qcom_tbu_trigger_atos()
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| /linux/tools/testing/selftests/kvm/include/arm64/ |
| H A D | processor.h | 244 #define readq_relaxed(c) ({ u64 __r = le64_to_cpu((__force __le64)__raw_readq(c)); __r; }) macro 249 #define readq(c) ({ u64 __v = readq_relaxed(c); __iormb(__v); __v; })
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| /linux/drivers/soc/apple/ |
| H A D | mailbox.c | 193 msg.msg0 = readq_relaxed(mbox->regs + mbox->hw->i2a_recv0); in apple_mbox_poll_locked() 196 readq_relaxed(mbox->regs + mbox->hw->i2a_recv1)); in apple_mbox_poll_locked()
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| /linux/rust/helpers/ |
| H A D | io.c | 99 return readq_relaxed(addr); in rust_helper_readq_relaxed()
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| /linux/drivers/crypto/marvell/octeontx2/ |
| H A D | otx2_cpt_common.h | 141 return readq_relaxed(reg_base + in otx2_cpt_read64()
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| /linux/tools/testing/selftests/kvm/lib/arm64/ |
| H A D | gic_v3_its.c | 22 return readq_relaxed(GITS_BASE_GVA + offset); in its_read_u64()
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| H A D | gic_v3.c | 323 typer = readq_relaxed(redist_base_cpu + GICR_TYPER); in gicv3_cpu_init()
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| /linux/drivers/irqchip/ |
| H A D | irq-ti-sci-inta.c | 159 val = readq_relaxed(inta->base + vint_desc->vint_id * 0x1000 + in ti_sci_inta_irq_handler()
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| /linux/drivers/acpi/ |
| H A D | cppc_acpi.c | 1180 *val = readq_relaxed(vaddr); in cpc_read() 1270 prev_val = readq_relaxed(vaddr); in cpc_write()
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| /linux/drivers/perf/hisilicon/ |
| H A D | hisi_pcie_pmu.c | 214 return readq_relaxed(pcie_pmu->base + offset); in hisi_pcie_pmu_readq()
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| /linux/drivers/resctrl/ |
| H A D | mpam_devices.c | 1490 val0 = readq_relaxed(regs + T241_SHADOW_REG_OFF(0, partid)); in mpam_apply_t241_erratum() 1494 val = readq_relaxed(regs + in mpam_apply_t241_erratum()
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