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Searched refs:readl_be (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/irqchip/
H A Dirq-realtek-rtl.c58 gimr = readl_be(REG(cpu, RTL_ICTL_GIMR)); in enable_gimr()
67 gimr = readl_be(REG(cpu, RTL_ICTL_GIMR)); in disable_gimr()
79 irr = readl_be(irr0 + offset) & ~(0xf << shift); in write_irr()
167 pending = readl_be(REG(cpu, RTL_ICTL_GIMR)) & in realtek_irq_dispatch()
168 readl_be(REG(cpu, RTL_ICTL_GISR)) & output->mask; in realtek_irq_dispatch()
/linux/sound/pci/mixart/
H A Dmixart_hwdep.c46 read = readl_be( MIXART_MEM( mgr, offset )); in mixart_wait_nice_for_register_value()
344 status_xilinx = readl_be( MIXART_MEM( mgr,MIXART_PSEUDOREG_MXLX_STATUS_OFFSET )); in mixart_dsp_load()
346 status_elf = readl_be( MIXART_MEM( mgr,MIXART_PSEUDOREG_ELF_STATUS_OFFSET )); in mixart_dsp_load()
348 status_daught = readl_be( MIXART_MEM( mgr,MIXART_PSEUDOREG_DXLX_STATUS_OFFSET )); in mixart_dsp_load()
462 mgr->board_type = (DAUGHTER_TYPE_MASK & readl_be( MIXART_MEM( mgr, MIXART_PSEUDOREG_DBRD_TYPE_OFFSET))); in mixart_dsp_load()
499 val = readl_be( MIXART_MEM( mgr, MIXART_PSEUDOREG_DXLX_BASE_ADDR_OFFSET )); in mixart_dsp_load()
H A Dmixart_hwdep.h15 #ifndef readl_be
16 #define readl_be(x) be32_to_cpu((__force __be32)__raw_readl(x)) macro
H A Dmixart.c1171 ref = readl_be( MIXART_MEM( chip->mgr, MIXART_PSEUDOREG_PERF_SYSTEM_LOAD_OFFSET)); in snd_mixart_proc_read()
1174 u32 mailbox = 100 * readl_be( MIXART_MEM( chip->mgr, MIXART_PSEUDOREG_PERF_MAILBX_LOAD_OFFSET)) / ref; in snd_mixart_proc_read()
1175 u32 streaming = 100 * readl_be( MIXART_MEM( chip->mgr, MIXART_PSEUDOREG_PERF_STREAM_LOAD_OFFSET)) / ref; in snd_mixart_proc_read()
1176 u32 interr = 100 * readl_be( MIXART_MEM( chip->mgr, MIXART_PSEUDOREG_PERF_INTERR_LOAD_OFFSET)) / ref; in snd_mixart_proc_read()
/linux/drivers/misc/ocxl/
H A Dmmio.c20 *val = readl_be((char *)afu->global_mmio_ptr + offset); in ocxl_global_mmio_read32()
124 tmp = readl_be((char *)afu->global_mmio_ptr + offset); in ocxl_global_mmio_set32()
186 tmp = readl_be((char *)afu->global_mmio_ptr + offset); in ocxl_global_mmio_clear32()
/linux/arch/sparc/include/asm/
H A Dio.h17 #define readl_be(__addr) __raw_readl(__addr) macro
/linux/arch/microblaze/include/asm/
H A Dio.h45 #define readl_be(a) in_be32((__force unsigned *)a) macro
/linux/drivers/usb/host/
H A Duhci-hcd.h604 return readl_be(uhci->regs + reg); in uhci_readl()
H A Dohci.h566 readl_be (regs) : in _ohci_readl()