/linux/arch/arm64/include/asm/ |
H A D | arch_gicv3.h | 19 #define read_gicreg(r) read_sysreg_s(SYS_ ## r) 39 irqstat = read_sysreg_s(SYS_ICC_IAR1_EL1); in gic_read_iar_common() 69 apr = read_sysreg_s(SYS_ICC_AP1R0_EL1); in gic_read_iar_cavium_thunderx() 71 irqstat = read_sysreg_s(SYS_ICC_IAR1_EL1); in gic_read_iar_cavium_thunderx() 76 if (likely(apr != read_sysreg_s(SYS_ICC_AP1R0_EL1))) in gic_read_iar_cavium_thunderx() 98 return read_sysreg_s(SYS_ICC_CTLR_EL1); in gic_read_ctlr() 114 return read_sysreg_s(SYS_ICC_SRE_EL1); in gic_read_sre() 130 return read_sysreg_s(SYS_ICC_PMR_EL1); in gic_read_pmr() 140 return read_sysreg_s(SYS_ICC_RPR_EL1); in gic_read_rpr()
|
H A D | arm_dsu_pmu.h | 35 return read_sysreg_s(CLUSTERPMCR_EL1); in __dsu_pmu_read_pmcr() 46 u32 val = read_sysreg_s(CLUSTERPMOVSCLR_EL1); in __dsu_pmu_get_reset_overflow() 62 return read_sysreg_s(CLUSTERPMXEVCNTR_EL1); in __dsu_pmu_read_counter() 81 return read_sysreg_s(CLUSTERPMCCNTR_EL1); in __dsu_pmu_read_pmccntr() 119 return read_sysreg_s(CLUSTERPMCEID0_EL1); in __dsu_pmu_read_pmceid() 121 return read_sysreg_s(CLUSTERPMCEID1_EL1); in __dsu_pmu_read_pmceid()
|
H A D | irqflags.h | 33 u32 pmr = read_sysreg_s(SYS_ICC_PMR_EL1); in __pmr_local_irq_enable() 62 u32 pmr = read_sysreg_s(SYS_ICC_PMR_EL1); in __pmr_local_irq_disable() 87 return read_sysreg_s(SYS_ICC_PMR_EL1); in __pmr_local_save_flags()
|
H A D | daifflags.h | 25 (read_sysreg_s(SYS_ICC_PMR_EL1) == (GIC_PRIO_IRQOFF | in local_daif_mask() 49 if (read_sysreg_s(SYS_ICC_PMR_EL1) != GIC_PRIO_IRQON) in local_daif_save_flags()
|
H A D | kvm_hyp.h | 27 #define read_sysreg_el0(r) read_sysreg_s(r##_EL02) 29 #define read_sysreg_el1(r) read_sysreg_s(r##_EL12) 31 #define read_sysreg_el2(r) read_sysreg_s(r##_EL1)
|
H A D | arm_pmuv3.h | 97 return read_sysreg_s(SYS_PMICNTR_EL0); in read_pmicntr() 137 return read_sysreg_s(SYS_PMICFILTR_EL0); in read_pmicfiltr()
|
H A D | fpsimd.h | 222 u64 __zcr = read_sysreg_s((reg)); \ 249 tmp = read_sysreg_s(SYS_ZCR_EL1) & ~ZCR_ELx_LEN_MASK; in write_vl() 255 tmp = read_sysreg_s(SYS_SMCR_EL1) & ~SMCR_ELx_LEN_MASK; in write_vl()
|
H A D | kvm_ptrauth.h | 108 __val = read_sysreg_s(SYS_ ## key ## KEYLO_EL1); \ 110 __val = read_sysreg_s(SYS_ ## key ## KEYHI_EL1); \
|
H A D | mmu.h | 91 u64 mmfr2 = read_sysreg_s(SYS_ID_AA64MMFR2_EL1); in kaslr_requires_kpti()
|
H A D | archrandom.h | 128 unsigned long ftr = read_sysreg_s(SYS_ID_AA64ISAR0_EL1); in __early_cpu_has_rndr()
|
H A D | cpufeature.h | 643 pfr0 = read_sysreg_s(SYS_ID_AA64PFR0_EL1); in supports_csv2p3() 657 isar2 = read_sysreg_s(SYS_ID_AA64ISAR2_EL1); in supports_clearbhb() 1016 mmfr2 = read_sysreg_s(SYS_ID_AA64MMFR2_EL1); in cpu_has_lva()
|
/linux/drivers/hwtracing/coresight/ |
H A D | coresight-trbe.h | 24 u64 aa64dfr0 = read_sysreg_s(SYS_ID_AA64DFR0_EL1); in is_trbe_available() 33 u64 trblimitr = read_sysreg_s(SYS_TRBLIMITR_EL1); in is_trbe_enabled() 58 u64 trbsr = read_sysreg_s(SYS_TRBSR_EL1); in clr_trbe_irq() 106 return read_sysreg_s(SYS_TRBPTR_EL1); in get_trbe_write_pointer() 117 u64 trblimitr = read_sysreg_s(SYS_TRBLIMITR_EL1); in get_trbe_limit_pointer() 126 u64 trbbaser = read_sysreg_s(SYS_TRBBASER_EL1); in get_trbe_base_pointer()
|
H A D | coresight-self-hosted-trace.h | 15 return read_sysreg_s(SYS_TRFCR_EL1); in read_trfcr()
|
/linux/drivers/perf/ |
H A D | apple_m1_cpu_pmu.c | 213 case _idx: return read_sysreg_s(SYS_IMP_APL_PMC## _idx ##_EL1) 273 val = read_sysreg_s(SYS_IMP_APL_PMCR0_EL1); in __m1_pmu_enable_counter() 308 val = read_sysreg_s(SYS_IMP_APL_PMCR0_EL1); in __m1_pmu_enable_counter_interrupt() 347 val = read_sysreg_s(SYS_IMP_APL_PMCR1_EL1); in m1_pmu_configure_counter() 372 val = read_sysreg_s(SYS_IMP_APL_PMESR0_EL1); in m1_pmu_configure_counter() 379 val = read_sysreg_s(SYS_IMP_APL_PMESR1_EL1); in m1_pmu_configure_counter() 421 overflow = read_sysreg_s(SYS_IMP_APL_PMSR_EL1); in m1_pmu_handle_irq() 424 state = read_sysreg_s(SYS_IMP_APL_PMCR0_EL1); in m1_pmu_handle_irq() 500 val = read_sysreg_s(SYS_IMP_APL_PMCR0_EL1); in __m1_pmu_set_mode()
|
H A D | arm_spe_pmu.c | 535 offset = read_sysreg_s(SYS_PMBPTR_EL1) - (u64)buf->base; in arm_spe_perf_aux_output_end() 578 pmbsr = read_sysreg_s(SYS_PMBSR_EL1); in arm_spe_pmu_buf_get_fault_act() 620 read_sysreg_s(SYS_PMBPTR_EL1), in arm_spe_pmu_buf_get_fault_act() 621 read_sysreg_s(SYS_PMBLIMITR_EL1)); in arm_spe_pmu_buf_get_fault_act() 827 local64_set(&hwc->period_left, read_sysreg_s(SYS_PMSICR_EL1)); in arm_spe_pmu_stop() 991 reg = read_sysreg_s(SYS_PMBIDR_EL1); in __arm_spe_pmu_dev_probe() 1008 reg = read_sysreg_s(SYS_PMSIDR_EL1); in __arm_spe_pmu_dev_probe()
|
/linux/drivers/irqchip/ |
H A D | irq-apple-aic.c | 412 (read_sysreg_s(SYS_ICH_HCR_EL2) & ICH_HCR_EN) && in aic_handle_irq() 413 read_sysreg_s(SYS_ICH_MISR_EL2) != 0) { in aic_handle_irq() 417 if (unlikely((read_sysreg_s(SYS_ICH_HCR_EL2) & ICH_HCR_EN) && in aic_handle_irq() 418 read_sysreg_s(SYS_ICH_MISR_EL2))) { in aic_handle_irq() 555 (read_sysreg_s(SYS_IMP_APL_IPI_SR_EL1) & IPI_SR_PENDING)) in aic_handle_fiq() 567 uint64_t enabled = read_sysreg_s(SYS_IMP_APL_VM_TMR_FIQ_ENA_EL2); in aic_handle_fiq() 570 TIMER_FIRING(read_sysreg_s(SYS_CNTP_CTL_EL02))) in aic_handle_fiq() 575 TIMER_FIRING(read_sysreg_s(SYS_CNTV_CTL_EL02))) in aic_handle_fiq() 580 if (read_sysreg_s(SYS_IMP_APL_PMCR0_EL1) & PMCR0_IACT) { in aic_handle_fiq() 592 (FIELD_GET(UPMCR0_IMODE, read_sysreg_s(SYS_IMP_APL_UPMCR0_EL1)) == UPMCR0_IMODE_FIQ) && in aic_handle_fiq() [all …]
|
/linux/arch/arm64/kvm/hyp/nvhe/ |
H A D | debug-sr.c | 29 reg = read_sysreg_s(SYS_PMBLIMITR_EL1); in __debug_save_spe() 59 if (!(read_sysreg_s(SYS_TRBLIMITR_EL1) & TRBLIMITR_EL1_E)) in __debug_save_trace()
|
/linux/arch/arm64/kvm/ |
H A D | fpsimd.c | 89 if (read_sysreg_s(SYS_SVCR) & (SVCR_SM_MASK | SVCR_ZA_MASK)) { in kvm_arch_vcpu_load_fp() 100 read_sysreg_s(SYS_SVCR)); in kvm_arch_vcpu_load_fp()
|
H A D | pauth.c | 44 gkey.lo = read_sysreg_s(SYS_APGAKEYLO_EL1); in compute_pac() 45 gkey.hi = read_sysreg_s(SYS_APGAKEYHI_EL1); in compute_pac()
|
H A D | debug.c | 332 !(read_sysreg_s(SYS_PMBIDR_EL1) & BIT(PMBIDR_EL1_P_SHIFT))) in kvm_arch_vcpu_load_debug_state_flags() 337 !(read_sysreg_s(SYS_TRBIDR_EL1) & TRBIDR_EL1_P)) in kvm_arch_vcpu_load_debug_state_flags()
|
/linux/arch/arm64/kernel/ |
H A D | process.c | 382 p->thread.tpidr2_el0 = read_sysreg_s(SYS_TPIDR2_EL0); in copy_thread() 385 p->thread.por_el0 = read_sysreg_s(SYS_POR_EL0); in copy_thread() 436 current->thread.tpidr2_el0 = read_sysreg_s(SYS_TPIDR2_EL0); in tls_preserve_current_state() 544 current->thread.por_el0 = read_sysreg_s(SYS_POR_EL0); in permission_overlay_switch()
|
H A D | topology.c | 75 #define read_corecnt() read_sysreg_s(SYS_AMEVCNTR0_CORE_EL0) 76 #define read_constcnt() read_sysreg_s(SYS_AMEVCNTR0_CONST_EL0)
|
H A D | fpsimd.c | 453 *(last->fpmr) = read_sysreg_s(SYS_FPMR); in fpsimd_save_user_state() 471 *svcr = read_sysreg_s(SYS_SVCR); in fpsimd_save_user_state() 699 write_sysreg_s(read_sysreg_s(SYS_SCTLR_EL1) | SCTLR_EL1_EnFPM_MASK, in cpu_enable_fpmr() 1255 write_sysreg_s(read_sysreg_s(SYS_SMPRI_EL1) & ~SMPRI_EL1_PRIORITY_MASK, in cpu_enable_sme() 1276 write_sysreg_s(read_sysreg_s(SYS_SMCR_EL1) | SMCR_ELx_EZT0_MASK, in cpu_enable_sme2() 1286 write_sysreg_s(read_sysreg_s(SYS_SMCR_EL1) | SMCR_ELx_FA64_MASK, in cpu_enable_fa64() 2020 svcr = read_sysreg_s(SYS_SVCR); in __efi_fpsimd_begin()
|
/linux/arch/arm64/kvm/hyp/include/hyp/ |
H A D | sysreg-sr.h | 27 ctxt_sys_reg(ctxt, POR_EL0) = read_sysreg_s(SYS_POR_EL0); in __sysreg_save_common_state() 118 ctxt_sys_reg(ctxt, TFSRE0_EL1) = read_sysreg_s(SYS_TFSRE0_EL1); in __sysreg_save_el1_state() 137 ctxt_sys_reg(ctxt, DISR_EL1) = read_sysreg_s(SYS_VDISR_EL2); in __sysreg_save_el2_return_state()
|
/linux/drivers/soc/qcom/ |
H A D | kryo-l2-accessors.c | 52 val = read_sysreg_s(L2CPUSRDR_EL1); in kryo_l2_get_indirect_reg()
|