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Searched refs:rdiv (Results 1 – 5 of 5) sorted by relevance

/linux/arch/mips/cavium-octeon/
H A Dcsrc-octeon.c26 static u64 rdiv; variable
46 rdiv = rst_boot.s.c_mul; /* CPU clock */ in octeon_setup_delays()
53 rdiv = rst_boot.s.c_mul; /* CPU clock */ in octeon_setup_delays()
87 if (rdiv != 0) { in octeon_init_cvmcount()
88 clk_count *= rdiv; in octeon_init_cvmcount()
198 if (rdiv != 0) { in octeon_io_clk_delay()
199 end = count * rdiv; in octeon_io_clk_delay()
/linux/drivers/clk/imx/
H A Dclk-fracn-gppll.c52 .rdiv = (_rdiv), \
62 .rdiv = (_rdiv), \
165 u32 mfi, mfn, mfd, rdiv, odiv; in clk_fracn_gppll_recalc_rate() local
179 rdiv = FIELD_GET(PLL_RDIV_MASK, pll_div); in clk_fracn_gppll_recalc_rate()
190 rate_table[i].mfd == mfd && rate_table[i].rdiv == rdiv && in clk_fracn_gppll_recalc_rate()
198 if (!rdiv) in clk_fracn_gppll_recalc_rate()
199 rdiv = rdiv + 1; in clk_fracn_gppll_recalc_rate()
215 do_div(fvco, rdiv * odiv); in clk_fracn_gppll_recalc_rate()
219 do_div(fvco, mfd * rdiv * odiv); in clk_fracn_gppll_recalc_rate()
261 pll_div = FIELD_PREP(PLL_RDIV_MASK, rate->rdiv) | rate->odiv | in clk_fracn_gppll_set_rate()
H A Dclk.h85 unsigned int rdiv; member
/linux/drivers/media/tuners/
H A Dtda18250.c428 static int tda18250_pll_calc(struct dvb_frontend *fe, u8 *rdiv, in tda18250_pll_calc() argument
451 *rdiv = 1; in tda18250_pll_calc()
457 *rdiv = 3; in tda18250_pll_calc()
463 *rdiv = 2; in tda18250_pll_calc()
467 *rdiv = 2; in tda18250_pll_calc()
471 *rdiv = 3; in tda18250_pll_calc()
477 *rdiv = 2; in tda18250_pll_calc()
487 lopd, scale, fvco, *rdiv, *ndiv, *icp); in tda18250_pll_calc()
/linux/drivers/clk/socfpga/
H A Dclk-pll-s10.c44 unsigned long fdiv, reg, rdiv, qdiv; in n5x_clk_pll_recalc_rate() local
50 rdiv = (reg & SOCFPGA_N5X_PLLDIV_RDIV_MASK); in n5x_clk_pll_recalc_rate()
58 return ((parent_rate * 2 * (fdiv + 1)) / ((rdiv + 1) * power)); in n5x_clk_pll_recalc_rate()