Searched refs:rc_range_params (Results 1 – 5 of 5) sorted by relevance
| /linux/drivers/gpu/drm/amd/display/dc/dsc/dcn401/ |
| H A D | dcn401_dsc.c | 335 RANGE_MIN_QP0, reg_vals->pps.rc_range_params[0].range_min_qp, in dsc_write_to_registers() 336 RANGE_MAX_QP0, reg_vals->pps.rc_range_params[0].range_max_qp, in dsc_write_to_registers() 337 RANGE_BPG_OFFSET0, reg_vals->pps.rc_range_params[0].range_bpg_offset); in dsc_write_to_registers() 340 RANGE_MIN_QP1, reg_vals->pps.rc_range_params[1].range_min_qp, in dsc_write_to_registers() 341 RANGE_MAX_QP1, reg_vals->pps.rc_range_params[1].range_max_qp, in dsc_write_to_registers() 342 RANGE_BPG_OFFSET1, reg_vals->pps.rc_range_params[1].range_bpg_offset, in dsc_write_to_registers() 343 RANGE_MIN_QP2, reg_vals->pps.rc_range_params[2].range_min_qp, in dsc_write_to_registers() 344 RANGE_MAX_QP2, reg_vals->pps.rc_range_params[2].range_max_qp, in dsc_write_to_registers() 345 RANGE_BPG_OFFSET2, reg_vals->pps.rc_range_params[2].range_bpg_offset); in dsc_write_to_registers() 348 RANGE_MIN_QP3, reg_vals->pps.rc_range_params[3].range_min_qp, in dsc_write_to_registers() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dsc/dcn20/ |
| H A D | dcn20_dsc.c | 337 DC_LOG_DSC("\trc_range_parameters[%d].range_min_qp %d", i, pps->rc_range_params[i].range_min_qp); in dsc_log_pps() 338 DC_LOG_DSC("\trc_range_parameters[%d].range_max_qp %d", i, pps->rc_range_params[i].range_max_qp); in dsc_log_pps() 339 …DC_LOG_DSC("\trc_range_parameters[%d].range_bpg_offset %d", i, pps->rc_range_params[i].range_bpg_o… in dsc_log_pps() 716 RANGE_MIN_QP0, reg_vals->pps.rc_range_params[0].range_min_qp, in dsc_write_to_registers() 717 RANGE_MAX_QP0, reg_vals->pps.rc_range_params[0].range_max_qp, in dsc_write_to_registers() 718 RANGE_BPG_OFFSET0, reg_vals->pps.rc_range_params[0].range_bpg_offset); in dsc_write_to_registers() 721 RANGE_MIN_QP1, reg_vals->pps.rc_range_params[1].range_min_qp, in dsc_write_to_registers() 722 RANGE_MAX_QP1, reg_vals->pps.rc_range_params[1].range_max_qp, in dsc_write_to_registers() 723 RANGE_BPG_OFFSET1, reg_vals->pps.rc_range_params[1].range_bpg_offset, in dsc_write_to_registers() 724 RANGE_MIN_QP2, reg_vals->pps.rc_range_params[2].range_min_qp, in dsc_write_to_registers() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dsc/ |
| H A D | rc_calc_dpi.c | 54 memcpy(&to->rc_range_params, &from->rc_range_params, sizeof(from->rc_range_params)); in copy_pps_fields() 84 dsc_cfg->rc_range_params[i].range_min_qp = rc->qp_min[i]; in copy_rc_to_cfg() 85 dsc_cfg->rc_range_params[i].range_max_qp = rc->qp_max[i]; in copy_rc_to_cfg() 87 dsc_cfg->rc_range_params[i].range_bpg_offset = 0x3f & rc->ofs[i]; in copy_rc_to_cfg()
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| /linux/drivers/gpu/drm/i915/display/ |
| H A D | intel_vdsc.c | 115 vdsc_cfg->rc_range_params[buf].range_min_qp = in intel_vdsc_set_min_max_qp() 117 vdsc_cfg->rc_range_params[buf].range_max_qp = in intel_vdsc_set_min_max_qp() 238 vdsc_cfg->rc_range_params[buf_i].range_bpg_offset = in calculate_rc_params() 286 vdsc_cfg->rc_range_params[buf_i].range_bpg_offset = in calculate_rc_params() 685 (u32)(((vdsc_cfg->rc_range_params[i].range_bpg_offset << in intel_dsc_pps_configure() 687 (vdsc_cfg->rc_range_params[i].range_max_qp << in intel_dsc_pps_configure() 689 (vdsc_cfg->rc_range_params[i].range_min_qp << in intel_dsc_pps_configure()
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| /linux/include/drm/display/ |
| H A D | drm_dsc.h | 179 struct drm_dsc_rc_range_parameters rc_range_params[DSC_NUM_BUF_RANGES]; member
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