Searched refs:rb_mask (Results 1 – 5 of 5) sorted by relevance
1363 u32 raster_config, unsigned rb_mask, in gfx_v6_0_write_harvested_raster_configs() argument1373 se_mask[0] = ((1 << rb_per_se) - 1) & rb_mask; in gfx_v6_0_write_harvested_raster_configs()1374 se_mask[1] = (se_mask[0] << rb_per_se) & rb_mask; in gfx_v6_0_write_harvested_raster_configs()1375 se_mask[2] = (se_mask[1] << rb_per_se) & rb_mask; in gfx_v6_0_write_harvested_raster_configs()1376 se_mask[3] = (se_mask[2] << rb_per_se) & rb_mask; in gfx_v6_0_write_harvested_raster_configs()1397 pkr0_mask &= rb_mask; in gfx_v6_0_write_harvested_raster_configs()1398 pkr1_mask &= rb_mask; in gfx_v6_0_write_harvested_raster_configs()1412 rb0_mask &= rb_mask; in gfx_v6_0_write_harvested_raster_configs()1413 rb1_mask &= rb_mask; in gfx_v6_0_write_harvested_raster_configs()1428 rb0_mask &= rb_mask; in gfx_v6_0_write_harvested_raster_configs()[all …]
1640 unsigned rb_mask, unsigned num_rb) in gfx_v7_0_write_harvested_raster_configs() argument1649 se_mask[0] = ((1 << rb_per_se) - 1) & rb_mask; in gfx_v7_0_write_harvested_raster_configs()1650 se_mask[1] = (se_mask[0] << rb_per_se) & rb_mask; in gfx_v7_0_write_harvested_raster_configs()1651 se_mask[2] = (se_mask[1] << rb_per_se) & rb_mask; in gfx_v7_0_write_harvested_raster_configs()1652 se_mask[3] = (se_mask[2] << rb_per_se) & rb_mask; in gfx_v7_0_write_harvested_raster_configs()1687 pkr0_mask &= rb_mask; in gfx_v7_0_write_harvested_raster_configs()1688 pkr1_mask &= rb_mask; in gfx_v7_0_write_harvested_raster_configs()1703 rb0_mask &= rb_mask; in gfx_v7_0_write_harvested_raster_configs()1704 rb1_mask &= rb_mask; in gfx_v7_0_write_harvested_raster_configs()1720 rb0_mask &= rb_mask; in gfx_v7_0_write_harvested_raster_configs()[all …]
3498 unsigned rb_mask, unsigned num_rb) in gfx_v8_0_write_harvested_raster_configs() argument3507 se_mask[0] = ((1 << rb_per_se) - 1) & rb_mask; in gfx_v8_0_write_harvested_raster_configs()3508 se_mask[1] = (se_mask[0] << rb_per_se) & rb_mask; in gfx_v8_0_write_harvested_raster_configs()3509 se_mask[2] = (se_mask[1] << rb_per_se) & rb_mask; in gfx_v8_0_write_harvested_raster_configs()3510 se_mask[3] = (se_mask[2] << rb_per_se) & rb_mask; in gfx_v8_0_write_harvested_raster_configs()3545 pkr0_mask &= rb_mask; in gfx_v8_0_write_harvested_raster_configs()3546 pkr1_mask &= rb_mask; in gfx_v8_0_write_harvested_raster_configs()3561 rb0_mask &= rb_mask; in gfx_v8_0_write_harvested_raster_configs()3562 rb1_mask &= rb_mask; in gfx_v8_0_write_harvested_raster_configs()3578 rb0_mask &= rb_mask; in gfx_v8_0_write_harvested_raster_configs()[all …]
1616 u32 rb_mask; in gfx_v12_0_get_rb_active_bitmap() local1626 rb_mask = amdgpu_gfx_create_bitmask(adev->gfx.config.max_backends_per_se * in gfx_v12_0_get_rb_active_bitmap()1629 return rb_mask & (~(gc_disabled_rb_mask | gc_user_disabled_rb_mask)); in gfx_v12_0_get_rb_active_bitmap()
1876 u32 rb_mask; in gfx_v11_0_get_rb_active_bitmap() local1886 rb_mask = amdgpu_gfx_create_bitmask(adev->gfx.config.max_backends_per_se * in gfx_v11_0_get_rb_active_bitmap()1889 return rb_mask & (~(gc_disabled_rb_mask | gc_user_disabled_rb_mask)); in gfx_v11_0_get_rb_active_bitmap()