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Searched refs:q_base (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/dma/
H A Dhisi_dma.c367 void __iomem *q_base = hdma_dev->queue_base; in hisi_dma_mask_irq() local
370 hisi_dma_chan_write(q_base, HISI_DMA_HIP08_Q_INT_MSK, in hisi_dma_mask_irq()
373 hisi_dma_chan_write(q_base, HISI_DMA_HIP09_Q_INT_MSK, in hisi_dma_mask_irq()
375 hisi_dma_chan_write(q_base, HISI_DMA_HIP09_Q_ERR_INT_MSK, in hisi_dma_mask_irq()
383 void __iomem *q_base = hdma_dev->queue_base; in hisi_dma_unmask_irq() local
386 hisi_dma_chan_write(q_base, HISI_DMA_HIP08_Q_INT_STS, in hisi_dma_unmask_irq()
388 hisi_dma_chan_write(q_base, HISI_DMA_HIP08_Q_INT_MSK, in hisi_dma_unmask_irq()
391 hisi_dma_chan_write(q_base, HISI_DMA_HIP09_Q_INT_STS, in hisi_dma_unmask_irq()
393 hisi_dma_chan_write(q_base, HISI_DMA_HIP09_Q_ERR_INT_STS, in hisi_dma_unmask_irq()
396 hisi_dma_chan_write(q_base, HISI_DMA_HIP09_Q_INT_MSK, in hisi_dma_unmask_irq()
[all …]
/linux/drivers/net/ethernet/amd/pds_core/
H A Dcore.c148 if (qcq->q_base) in pdsc_qcq_free()
150 qcq->q_base, qcq->q_base_pa); in pdsc_qcq_free()
192 void *q_base, *cq_base; in pdsc_qcq_alloc() local
236 qcq->q_base = dma_alloc_coherent(dev, in pdsc_qcq_alloc()
240 if (!qcq->q_base) { in pdsc_qcq_alloc()
244 q_base = PTR_ALIGN(qcq->q_base, PDS_PAGE_SIZE); in pdsc_qcq_alloc()
246 pdsc_q_map(&qcq->q, q_base, q_base_pa); in pdsc_qcq_alloc()
248 cq_base = PTR_ALIGN(q_base + in pdsc_qcq_alloc()
258 qcq->q_base = dma_alloc_coherent(dev, qcq->q_size, in pdsc_qcq_alloc()
261 if (!qcq->q_base) { in pdsc_qcq_alloc()
[all …]
H A Dcore.h117 void *q_base; member
/linux/drivers/iommu/arm/arm-smmu-v3/
H A Dtegra241-cmdqv.c391 writeq_relaxed(vcmdq->cmdq.q.q_base, REG_VCMDQ_PAGE1(vcmdq, BASE)); in tegra241_vcmdq_hw_init()
525 q->q_base = q->base_dma & VCMDQ_ADDR; in tegra241_vcmdq_alloc_smmu_cmdq()
526 q->q_base |= FIELD_PREP(VCMDQ_LOG2SIZE, q->llq.max_n_shift); in tegra241_vcmdq_alloc_smmu_cmdq()
H A Darm-smmu-v3.c3698 q->q_base = Q_BASE_RWA; in arm_smmu_init_one_queue()
3699 q->q_base |= q->base_dma & Q_BASE_ADDR_MASK; in arm_smmu_init_one_queue()
3700 q->q_base |= FIELD_PREP(Q_BASE_LOG2SIZE, q->llq.max_n_shift); in arm_smmu_init_one_queue()
4102 writeq_relaxed(smmu->cmdq.q.q_base, smmu->base + ARM_SMMU_CMDQ_BASE); in arm_smmu_device_reset()
4128 writeq_relaxed(smmu->evtq.q.q_base, smmu->base + ARM_SMMU_EVTQ_BASE); in arm_smmu_device_reset()
4142 writeq_relaxed(smmu->priq.q.q_base, in arm_smmu_device_reset()
/linux/drivers/net/ethernet/pensando/ionic/
H A Dionic_lif.c416 if (qcq->q_base) { in ionic_qcq_free()
417 dma_free_coherent(dev, qcq->q_size, qcq->q_base, qcq->q_base_pa); in ionic_qcq_free()
418 qcq->q_base = NULL; in ionic_qcq_free()
642 new->q_base = dma_alloc_coherent(dev, new->q_size, in ionic_qcq_alloc()
644 if (!new->q_base) { in ionic_qcq_alloc()
649 new->q.base = PTR_ALIGN(new->q_base, PAGE_SIZE); in ionic_qcq_alloc()
659 new->q_base = dma_alloc_coherent(dev, new->q_size, &new->q_base_pa, in ionic_qcq_alloc()
661 if (!new->q_base) { in ionic_qcq_alloc()
666 new->q.base = PTR_ALIGN(new->q_base, PAGE_SIZE); in ionic_qcq_alloc()
739 dma_free_coherent(dev, new->q_size, new->q_base, new->q_base_pa); in ionic_qcq_alloc()
[all …]
H A Dionic_lif.h71 void *q_base; member
/linux/drivers/net/ethernet/intel/ice/
H A Dice_main.c2764 int xdp_rings_per_v, q_id, q_base; in ice_map_xdp_rings() local
2768 q_base = vsi->num_xdp_txq - xdp_rings_rem; in ice_map_xdp_rings()
2770 for (q_id = q_base; q_id < (q_base + xdp_rings_per_v); q_id++) { in ice_map_xdp_rings()