| /linux/sound/soc/codecs/ |
| H A D | wm8940.c | 481 u16 pwr_reg = snd_soc_component_read(component, WM8940_POWER1) & 0x1F0; in wm8940_set_bias_level()
487 pwr_reg |= (1 << 2) | (1 << 3); in wm8940_set_bias_level()
494 ret = snd_soc_component_write(component, WM8940_POWER1, pwr_reg | 0x1); in wm8940_set_bias_level()
498 pwr_reg |= (1 << 2) | (1 << 3); in wm8940_set_bias_level()
499 ret = snd_soc_component_write(component, WM8940_POWER1, pwr_reg | 0x1); in wm8940_set_bias_level()
511 pwr_reg |= (1 << 2) | (1 << 3); in wm8940_set_bias_level()
513 ret = snd_soc_component_write(component, WM8940_POWER1, pwr_reg | 0x2); in wm8940_set_bias_level()
516 ret = snd_soc_component_write(component, WM8940_POWER1, pwr_reg); in wm8940_set_bias_level()
480 u16 pwr_reg = snd_soc_component_read(component, WM8940_POWER1) & 0x1F0; wm8940_set_bias_level() local
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| H A D | wm8958-dsp2.c | 328 int pwr_reg = snd_soc_component_read(component, WM8994_POWER_MANAGEMENT_5); in wm8958_dsp_apply()
333 pwr_reg &= (WM8994_AIF1DAC1L_ENA | WM8994_AIF1DAC1R_ENA); in wm8958_dsp_apply()
337 pwr_reg &= (WM8994_AIF1DAC2L_ENA | WM8994_AIF1DAC2R_ENA); in wm8958_dsp_apply()
341 pwr_reg &= (WM8994_AIF2DACL_ENA | WM8994_AIF2DACR_ENA); in wm8958_dsp_apply()
353 if (!pwr_reg) in wm8958_dsp_apply()
359 path, wm8994->dsp_active, start, pwr_reg, reg); in wm8958_dsp_apply()
327 int pwr_reg = snd_soc_component_read(component, WM8994_POWER_MANAGEMENT_5); wm8958_dsp_apply() local
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| H A D | wm8753.c | 1334 u16 pwr_reg = snd_soc_component_read(component, WM8753_PWR1) & 0xfe3e; in wm8753_set_bias_level() local
1339 snd_soc_component_write(component, WM8753_PWR1, pwr_reg | 0x00c0); in wm8753_set_bias_level()
1348 snd_soc_component_write(component, WM8753_PWR1, pwr_reg | 0x01c1); in wm8753_set_bias_level()
1353 snd_soc_component_write(component, WM8753_PWR1, pwr_reg | 0x0141); in wm8753_set_bias_level()
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| /linux/drivers/mmc/host/ |
| H A D | mmci_stm32_sdmmc.c | 394 pwr |= host->pwr_reg & (MCI_STM32_VSWITCHEN | in mmci_sdmmc_set_pwrreg()
662 mmci_write_pwrreg(host, host->pwr_reg | MCI_STM32_VSWITCHEN); in sdmmc_pre_sig_volt_vswitch()
674 host->pwr_reg & MCI_STM32_VSWITCHEN) { in sdmmc_post_sig_volt_switch()
675 mmci_write_pwrreg(host, host->pwr_reg | MCI_STM32_VSWITCH); in sdmmc_post_sig_volt_switch()
687 mmci_write_pwrreg(host, host->pwr_reg & in sdmmc_post_sig_volt_switch()
731 host->pwr_reg = readl_relaxed(host->base + MMCIPOWER); in sdmmc_variant_init()
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| /linux/drivers/clk/mediatek/ |
| H A D | clk-mt7986-apmixed.c | 26 .id = _id, .name = _name, .reg = _reg, .pwr_reg = _pwr_reg, \
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| H A D | clk-mt7981-apmixed.c | 28 .id = _id, .name = _name, .reg = _reg, .pwr_reg = _pwr_reg, \
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| H A D | clk-mt8188-apmixedsys.c | 39 .pwr_reg = _pwr_reg, \
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| H A D | clk-mt6735-apmixedsys.c | 54 .pwr_reg = _pwr_reg, \
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| H A D | clk-mt8195-apmixedsys.c | 40 .pwr_reg = _pwr_reg, \
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| H A D | clk-pll.c | 336 pll->pwr_addr = base + data->pwr_reg; in mtk_clk_register_pll_ops()
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| H A D | clk-mt2701.c | 925 .pwr_reg = _pwr_reg, \
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| H A D | clk-mt6765.c | 676 .pwr_reg = _pwr_reg, \
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| /linux/drivers/clk/ |
| H A D | clk-rp1.c | 324 u32 pwr_reg; member
396 u32 pwr = clockman_read(clockman, data->pwr_reg); in rp1_pll_core_is_on()
413 clockman_write(clockman, data->pwr_reg, PLL_PWR_MASK); in rp1_pll_core_on()
421 clockman_write(clockman, data->pwr_reg, fbdiv_frac ? 0 : PLL_PWR_DSMPD); in rp1_pll_core_on()
442 clockman_write(clockman, data->pwr_reg, 0); in rp1_pll_core_off()
495 clockman_write(clockman, data->pwr_reg, fbdiv_frac ? 0 : PLL_PWR_DSMPD); in rp1_pll_core_set_rate()
1311 .pwr_reg = PLL_SYS_PWR,
1326 .pwr_reg = PLL_AUDIO_PWR,
1341 .pwr_reg = PLL_VIDEO_PWR,
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