Searched refs:psw_mask (Results 1 – 7 of 7) sorted by relevance
29 new_psw[0] = (*vcpu)->run->psw_mask; in test_step_int_1()50 TEST_ASSERT_EQ(vcpu->run->psw_mask, new_psw[0]); in test_step_int()93 TEST_ASSERT_EQ(vcpu->run->psw_mask, new_psw[0]); in test_step_pgm_diag()
384 t.run->psw_mask &= ~(3UL << (63 - 17)); in test_copy_access_register()385 t.run->psw_mask |= 1UL << (63 - 17); /* Enable AR mode */ in test_copy_access_register()831 psw[0] = t.run->psw_mask; in test_termination()1027 t.run->psw_mask &= ~(3UL << (63 - 17)); in test_errors()1028 t.run->psw_mask |= 1UL << (63 - 17); /* Enable AR mode */ in test_errors()1032 t.run->psw_mask &= ~(3UL << (63 - 17)); /* Disable AR mode */ in test_errors()
479 run->psw_mask = 0x0000000180000000ULL; in TEST_F()544 run->psw_mask = 0x0000000180000000ULL; in TEST_F()590 run->psw_mask = 0x0000000180000000ULL; in TEST_F()
160 TEST_ASSERT(vcpu->run->psw_mask == 0, "psw_mask == 0 (kvm_run)"); in assert_initial()
32 unsigned long psw_mask, addr; in sclp_early_wait_irq() local43 psw_mask = __extract_psw(); in sclp_early_wait_irq()44 get_lowcore()->external_new_psw.mask = psw_mask; in sclp_early_wait_irq()45 psw_wait.mask = psw_mask | PSW_MASK_EXT | PSW_MASK_WAIT; in sclp_early_wait_irq()
187 vcpu->run->psw_mask = 0x0400000180000000ULL; /* DAT enabled + 64 bit mode */ in vm_arch_vcpu_add()215 indent, "", vcpu->run->psw_mask, vcpu->run->psw_addr); in vcpu_arch_dump()
241 __u64 psw_mask; /* psw upper half */ member