| /linux/drivers/gpu/drm/nouveau/nvkm/subdev/clk/ |
| H A D | base.c | 42 u8 pstate, u8 domain, u32 input) in nvkm_clk_adjust() argument
49 data = nvbios_boostEm(bios, pstate, &ver, &hdr, &cnt, &len, &boostE); in nvkm_clk_adjust()
112 nvkm_cstate_find_best(struct nvkm_clk *clk, struct nvkm_pstate *pstate, in nvkm_cstate_find_best() argument
119 if (!pstate || !cstate) in nvkm_cstate_find_best()
136 list_for_each_entry_from_reverse(cstate, &pstate->list, head) { in nvkm_cstate_find_best()
145 nvkm_cstate_get(struct nvkm_clk *clk, struct nvkm_pstate *pstate, int cstatei) in nvkm_cstate_get() argument
149 return list_last_entry(&pstate->list, typeof(*cstate), head); in nvkm_cstate_get()
151 list_for_each_entry(cstate, &pstate->list, head) { in nvkm_cstate_get()
160 nvkm_cstate_prog(struct nvkm_clk *clk, struct nvkm_pstate *pstate, int cstatei) in nvkm_cstate_prog() argument
169 if (!list_empty(&pstate->list)) { in nvkm_cstate_prog()
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| /linux/drivers/gpu/drm/msm/disp/dpu1/ |
| H A D | dpu_plane.c | 578 static void _dpu_plane_color_fill_pipe(struct dpu_plane_state *pstate, in _dpu_plane_color_fill_pipe() argument
623 struct dpu_plane_state *pstate = to_dpu_plane_state(plane->state); in _dpu_plane_color_fill() local
640 if (!pstate->pipe[i].sspp) in _dpu_plane_color_fill()
642 _dpu_plane_color_fill_pipe(pstate, &pstate->pipe[i], in _dpu_plane_color_fill()
643 &pstate->pipe_cfg[i].dst_rect, in _dpu_plane_color_fill()
653 struct dpu_plane_state *pstate = to_dpu_plane_state(new_state); in dpu_plane_prepare_fb() local
668 ret = msm_framebuffer_prepare(new_state->fb, pstate->needs_dirtyfb); in dpu_plane_prepare_fb()
826 struct dpu_plane_state *pstate = to_dpu_plane_state(new_plane_state); in dpu_plane_atomic_check_nosspp() local
846 pstate->stage = DPU_STAGE_0 + pstate->base.normalized_zpos; in dpu_plane_atomic_check_nosspp()
847 if (pstate->stage >= pdpu->catalog->caps->max_mixer_blendstages) { in dpu_plane_atomic_check_nosspp()
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| H A D | dpu_crtc.c | 323 struct dpu_plane_state *pstate, in _dpu_crtc_setup_blend_cfg() argument
333 fg_alpha = pstate->base.alpha >> 8; in _dpu_crtc_setup_blend_cfg()
336 fg_alpha = pstate->base.alpha >> 6; in _dpu_crtc_setup_blend_cfg()
341 if (pstate->base.pixel_blend_mode == DRM_MODE_BLEND_PIXEL_NONE || in _dpu_crtc_setup_blend_cfg()
345 } else if (pstate->base.pixel_blend_mode == DRM_MODE_BLEND_PREMULTI) { in _dpu_crtc_setup_blend_cfg()
370 lm->ops.setup_blend_config(lm, pstate->stage, in _dpu_crtc_setup_blend_cfg()
449 struct dpu_plane_state *pstate = NULL; in _dpu_crtc_blend_setup_mixer() local
467 pstate = to_dpu_plane_state(state); in _dpu_crtc_blend_setup_mixer()
470 format = msm_framebuffer_format(pstate->base.fb); in _dpu_crtc_blend_setup_mixer()
472 if (pstate->stage == DPU_STAGE_BASE && format->alpha_enable) in _dpu_crtc_blend_setup_mixer()
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| /linux/arch/arm64/kernel/ |
| H A D | process.c | 162 u64 pstate = regs->pstate; in print_pstate() local
166 pstate, in print_pstate()
167 pstate & PSR_AA32_N_BIT ? 'N' : 'n', in print_pstate()
168 pstate & PSR_AA32_Z_BIT ? 'Z' : 'z', in print_pstate()
169 pstate & PSR_AA32_C_BIT ? 'C' : 'c', in print_pstate()
170 pstate & PSR_AA32_V_BIT ? 'V' : 'v', in print_pstate()
171 pstate & PSR_AA32_Q_BIT ? 'Q' : 'q', in print_pstate()
172 pstate & PSR_AA32_T_BIT ? "T32" : "A32", in print_pstate()
173 pstate & PSR_AA32_E_BIT ? "BE" : "LE", in print_pstate()
174 pstate & PSR_AA32_A_BIT ? 'A' : 'a', in print_pstate()
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| /linux/drivers/regulator/ |
| H A D | pwm-regulator.c | 86 struct pwm_state pstate; in pwm_regulator_set_voltage_sel() local
89 pwm_init_state(drvdata->pwm, &pstate); in pwm_regulator_set_voltage_sel()
90 pwm_set_relative_duty_cycle(&pstate, in pwm_regulator_set_voltage_sel()
93 ret = pwm_apply_might_sleep(drvdata->pwm, &pstate); in pwm_regulator_set_voltage_sel()
154 struct pwm_state pstate; in pwm_regulator_get_voltage() local
158 pwm_get_state(drvdata->pwm, &pstate); in pwm_regulator_get_voltage()
160 if (!pstate.enabled) { in pwm_regulator_get_voltage()
161 if (pstate.polarity == PWM_POLARITY_INVERSED) in pwm_regulator_get_voltage()
162 pstate.duty_cycle = pstate.period; in pwm_regulator_get_voltage()
164 pstate.duty_cycle = 0; in pwm_regulator_get_voltage()
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| /linux/drivers/cpufreq/ |
| H A D | intel_pstate.c | 236 struct pstate_data pstate; member
295 u64 (*get_val)(struct cpudata*, int pstate);
538 if (freq == cpu->pstate.turbo_freq) in intel_pstate_freq_to_hwp_rel()
539 return cpu->pstate.turbo_pstate; in intel_pstate_freq_to_hwp_rel()
541 if (freq == cpu->pstate.max_freq) in intel_pstate_freq_to_hwp_rel()
542 return cpu->pstate.max_pstate; in intel_pstate_freq_to_hwp_rel()
546 return freq / cpu->pstate.scaling; in intel_pstate_freq_to_hwp_rel()
548 return DIV_ROUND_CLOSEST(freq, cpu->pstate.scaling); in intel_pstate_freq_to_hwp_rel()
551 return DIV_ROUND_UP(freq, cpu->pstate.scaling); in intel_pstate_freq_to_hwp_rel()
572 int perf_ctl_max_phys = cpu->pstate.max_pstate_physical; in intel_pstate_hybrid_hwp_adjust()
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| H A D | apple-soc-cpufreq.c | 140 unsigned int pstate; in apple_soc_cpufreq_get_rate() local
151 pstate = (reg & priv->info->cur_pstate_mask) >> priv->info->cur_pstate_shift; in apple_soc_cpufreq_get_rate()
159 pstate = FIELD_GET(APPLE_DVFS_CMD_PS1, reg); in apple_soc_cpufreq_get_rate()
163 if (p->driver_data == pstate) in apple_soc_cpufreq_get_rate()
167 pstate); in apple_soc_cpufreq_get_rate()
175 unsigned int pstate = policy->freq_table[index].driver_data; in apple_soc_cpufreq_set_target() local
189 reg |= pstate << priv->info->ps1_shift; in apple_soc_cpufreq_set_target()
192 reg |= FIELD_PREP(APPLE_DVFS_CMD_PS2, pstate); in apple_soc_cpufreq_set_target()
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| /linux/drivers/gpu/drm/arm/ |
| H A D | malidp_crtc.c | 255 const struct drm_plane_state *pstate; in malidp_crtc_atomic_check_scaling() local
270 drm_atomic_crtc_state_for_each_plane_state(plane, pstate, state) { in malidp_crtc_atomic_check_scaling()
281 h_upscale_factor = div_u64((u64)pstate->crtc_w << 32, in malidp_crtc_atomic_check_scaling()
282 pstate->src_w); in malidp_crtc_atomic_check_scaling()
283 v_upscale_factor = div_u64((u64)pstate->crtc_h << 32, in malidp_crtc_atomic_check_scaling()
284 pstate->src_h); in malidp_crtc_atomic_check_scaling()
289 if (pstate->rotation & MALIDP_ROTATED_MASK) { in malidp_crtc_atomic_check_scaling()
290 s->input_w = pstate->src_h >> 16; in malidp_crtc_atomic_check_scaling()
291 s->input_h = pstate->src_w >> 16; in malidp_crtc_atomic_check_scaling()
293 s->input_w = pstate->src_w >> 16; in malidp_crtc_atomic_check_scaling()
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| /linux/Documentation/admin-guide/pm/ |
| H A D | amd-pstate.rst | 5 ``amd-pstate`` CPU Performance Scaling Driver
16 ``amd-pstate`` is the AMD CPU performance scaling driver that introduces a
26 ``amd-pstate`` leverages the Linux kernel governors such as ``schedutil``,
30 Volume 2: System Programming [1]_). Currently, ``amd-pstate`` supports basic
45 interpreter for performance adjustments. ``amd-pstate`` will initialize a
117 effectively conveys the most efficient performance level to ``amd-pstate``.
130 ``amd-pstate`` passes performance goals through these registers. The
136 ``amd-pstate`` specifies the minimum allowed performance level.
141 ``amd-pstate`` specifies a limit the maximum performance that is expected
147 ``amd-pstate`` specifies a desired target in the CPPC performance scale as
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| /linux/samples/bpf/ |
| H A D | cpustat_kern.c | 106 u64 *cts, *pts, *cstate, *pstate, prev_state, cur_ts, delta; in bpf_prog1() local
131 pstate = bpf_map_lookup_elem(&my_map, &key); in bpf_prog1()
132 if (!pstate) in bpf_prog1()
171 pstate_idx = find_cpu_pstate_idx(*pstate); in bpf_prog1()
214 u64 *pts, *cstate, *pstate, cur_ts, delta; in bpf_prog2() local
226 pstate = bpf_map_lookup_elem(&my_map, &key); in bpf_prog2()
227 if (!pstate) in bpf_prog2()
235 *pstate = ctx->state; in bpf_prog2()
267 pstate_idx = find_cpu_pstate_idx(*pstate); in bpf_prog2()
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| /linux/drivers/gpu/drm/nouveau/nvkm/engine/device/ |
| H A D | ctrl.c | 55 args->v0.pstate = clk->pstate; in nvkm_control_mthd_pstate_info()
61 args->v0.pstate = NVIF_CONTROL_PSTATE_INFO_V0_PSTATE_UNKNOWN; in nvkm_control_mthd_pstate_info()
75 struct nvkm_pstate *pstate; in nvkm_control_mthd_pstate_attr() local
106 list_for_each_entry(pstate, &clk->states, head) { in nvkm_control_mthd_pstate_attr()
111 lo = pstate->base.domain[domain->name]; in nvkm_control_mthd_pstate_attr()
113 list_for_each_entry(cstate, &pstate->list, head) { in nvkm_control_mthd_pstate_attr()
118 args->v0.state = pstate->pstate; in nvkm_control_mthd_pstate_attr()
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| /linux/drivers/gpu/drm/msm/disp/mdp5/ |
| H A D | mdp5_plane.c | 67 struct mdp5_plane_state *pstate = to_mdp5_plane_state(state); in mdp5_plane_atomic_print_state() local
70 drm_printf(p, "\thwpipe=%s\n", pstate->hwpipe ? in mdp5_plane_atomic_print_state()
71 pstate->hwpipe->name : "(null)"); in mdp5_plane_atomic_print_state()
74 pstate->r_hwpipe ? pstate->r_hwpipe->name : in mdp5_plane_atomic_print_state()
76 drm_printf(p, "\tblend_mode=%u\n", pstate->base.pixel_blend_mode); in mdp5_plane_atomic_print_state()
77 drm_printf(p, "\tzpos=%u\n", pstate->base.zpos); in mdp5_plane_atomic_print_state()
78 drm_printf(p, "\tnormalized_zpos=%u\n", pstate->base.normalized_zpos); in mdp5_plane_atomic_print_state()
79 drm_printf(p, "\talpha=%u\n", pstate->base.alpha); in mdp5_plane_atomic_print_state()
80 drm_printf(p, "\tstage=%s\n", stage2name(pstate->stage)); in mdp5_plane_atomic_print_state()
119 struct mdp5_plane_state *pstate = to_mdp5_plane_state(state); in mdp5_plane_destroy_state() local
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| H A D | mdp5_crtc.c | 218 struct mdp5_plane_state *pstate, *pstates[STAGE_MAX + 1] = {NULL}; in blend_setup() local
249 pstate = to_mdp5_plane_state(plane->state); in blend_setup()
250 pstates[pstate->stage] = pstate; in blend_setup()
251 stage[pstate->stage][PIPE_LEFT] = mdp5_plane_pipe(plane); in blend_setup()
257 r_stage[pstate->stage][PIPE_LEFT] = in blend_setup()
266 stage[pstate->stage][PIPE_RIGHT] = right_pipe; in blend_setup()
267 r_stage[pstate->stage][PIPE_RIGHT] = right_pipe; in blend_setup()
662 struct drm_plane_state *pstate) in is_fullscreen() argument
664 return (pstate->crtc_x <= 0) && (pstate->crtc_y <= 0) && in is_fullscreen()
665 ((pstate->crtc_x + pstate->crtc_w) >= cstate->mode.hdisplay) && in is_fullscreen()
[all …]
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| /linux/arch/sparc/kernel/ |
| H A D | rtrap_64.S | 28 661: wrpr %g0, RTRAP_PSTATE, %pstate
36 wrpr %g0, RTRAP_PSTATE|PSTATE_MCDE, %pstate
39 wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate
44 661: wrpr %g0, RTRAP_PSTATE, %pstate
52 wrpr %g0, RTRAP_PSTATE|PSTATE_MCDE, %pstate
55 wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate
70 661: wrpr %g0, RTRAP_PSTATE, %pstate
78 wrpr %g0, RTRAP_PSTATE|PSTATE_MCDE, %pstate
80 wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate
159 to_user: wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate
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| H A D | spiterrs.S | 159 rdpr %pstate, %g4
160 wrpr %g4, PSTATE_MG|PSTATE_AG, %pstate
187 rdpr %pstate, %g4
188 wrpr %g4, PSTATE_MG|PSTATE_AG, %pstate
207 rdpr %pstate, %g4
208 wrpr %g4, PSTATE_MG|PSTATE_AG, %pstate
226 rdpr %pstate, %g4
227 wrpr %g4, PSTATE_MG|PSTATE_AG, %pstate
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| H A D | tsb.S | 147 661: rdpr %pstate, %g5
148 wrpr %g5, PSTATE_AG | PSTATE_MG, %pstate
254 661: rdpr %pstate, %g5
255 wrpr %g5, PSTATE_AG | PSTATE_MG, %pstate
320 rdpr %pstate, %o5
321 wrpr %o5, PSTATE_IE, %pstate
324 wrpr %o5, %pstate
374 rdpr %pstate, %g1
375 wrpr %g1, PSTATE_IE, %pstate
457 wrpr %g1, %pstate
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| H A D | helpers.S | 29 rdpr %pstate, %o0
30 wrpr %o0, PSTATE_IE, %pstate
45 wrpr %o0, %pstate
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| /linux/drivers/gpu/drm/rockchip/ |
| H A D | rockchip_drm_vop2.c | 417 static bool vop2_half_block_enable(struct drm_plane_state *pstate) in vop2_half_block_enable() argument
419 if (pstate->rotation & (DRM_MODE_ROTATE_270 | DRM_MODE_ROTATE_90)) in vop2_half_block_enable()
425 static u32 vop2_afbc_transform_offset(struct drm_plane_state *pstate, in vop2_afbc_transform_offset() argument
428 struct drm_rect *src = &pstate->src; in vop2_afbc_transform_offset()
429 struct drm_framebuffer *fb = pstate->fb; in vop2_afbc_transform_offset()
454 switch (pstate->rotation & in vop2_afbc_transform_offset()
510 struct drm_plane_state *pstate) in vop2_get_cluster_lb_mode() argument
512 if ((pstate->rotation & DRM_MODE_ROTATE_270) || in vop2_get_cluster_lb_mode()
513 (pstate->rotation & DRM_MODE_ROTATE_90)) in vop2_get_cluster_lb_mode()
702 struct drm_plane_state *pstate) in vop2_setup_csc_mode() argument
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| /linux/arch/arm64/kvm/ |
| H A D | reset.c | 194 u32 pstate; in kvm_reset_vcpu() local
214 pstate = VCPU_RESET_PSTATE_SVC; in kvm_reset_vcpu()
216 pstate = VCPU_RESET_PSTATE_EL2; in kvm_reset_vcpu()
218 pstate = VCPU_RESET_PSTATE_EL1; in kvm_reset_vcpu()
227 vcpu_gp_regs(vcpu)->pstate = pstate; in kvm_reset_vcpu()
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| /linux/tools/testing/selftests/amd-pstate/ |
| H A D | basic.sh | 27 if ! /sbin/modprobe -q -n amd-pstate-ut; then
31 if /sbin/modprobe -q amd-pstate-ut; then
32 /sbin/modprobe -q -r amd-pstate-ut
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| /linux/drivers/net/wwan/ |
| H A D | wwan_hwsim.c | 68 } pstate; member
117 port->at_emul.pstate = AT_PARSER_WAIT_A; in wwan_hwsim_at_emul_start()
154 if (port->at_emul.pstate == AT_PARSER_WAIT_A) { in wwan_hwsim_at_emul_tx()
156 port->at_emul.pstate = AT_PARSER_WAIT_T; in wwan_hwsim_at_emul_tx()
158 port->at_emul.pstate = AT_PARSER_SKIP_LINE; in wwan_hwsim_at_emul_tx()
159 } else if (port->at_emul.pstate == AT_PARSER_WAIT_T) { in wwan_hwsim_at_emul_tx()
161 port->at_emul.pstate = AT_PARSER_WAIT_TERM; in wwan_hwsim_at_emul_tx()
163 port->at_emul.pstate = AT_PARSER_SKIP_LINE; in wwan_hwsim_at_emul_tx()
164 } else if (port->at_emul.pstate == AT_PARSER_WAIT_TERM) { in wwan_hwsim_at_emul_tx()
174 port->at_emul.pstate = AT_PARSER_WAIT_A; in wwan_hwsim_at_emul_tx()
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| /linux/arch/arm64/include/asm/ |
| H A D | processor.h | 303 unsigned long pstate) in start_thread_common() argument
311 .pstate = pstate, in start_thread_common()
348 unsigned long pstate = PSR_AA32_MODE_USR; in compat_start_thread() local
350 pstate |= PSR_AA32_T_BIT; in compat_start_thread()
352 pstate |= PSR_AA32_E_BIT; in compat_start_thread()
354 start_thread_common(regs, pc, pstate); in compat_start_thread()
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| /linux/drivers/gpu/drm/nouveau/nvkm/subdev/bios/ |
| H A D | cstep.c | 78 info->pstate = (nvbios_rd16(bios, data + 0x00) & 0x01e0) >> 5; in nvbios_cstepEp()
85 nvbios_cstepEm(struct nvkm_bios *bios, u8 pstate, u8 *ver, u8 *hdr, in nvbios_cstepEm() argument
90 if (info->pstate == pstate) in nvbios_cstepEm()
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| H A D | boost.c | 81 info->pstate = (nvbios_rd16(bios, data + 0x00) & 0x01e0) >> 5; in nvbios_boostEp()
89 nvbios_boostEm(struct nvkm_bios *bios, u8 pstate, in nvbios_boostEm() argument
94 if (info->pstate == pstate) in nvbios_boostEm()
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| /linux/arch/sparc/mm/ |
| H A D | ultra.S | 60 rdpr %pstate, %g7
62 wrpr %g2, %pstate
77 wrpr %g7, 0x0, %pstate
87 rdpr %pstate, %g7
90 wrpr %g2, %pstate
109 wrpr %g7, 0x0, %pstate
174 rdpr %pstate, %g1
175 wrpr %g1, PSTATE_IE, %pstate
184 wrpr %g1, 0, %pstate
251 rdpr %pstate, %g7
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