Searched refs:psr_context (Results 1 – 6 of 6) sorted by relevance
294 struct psr_context *psr_context, in dmub_psr_copy_settings() argument324 psr_context->psrExitLinkTrainingRequired); in dmub_psr_copy_settings()328 psr_context->sdpTransmitLineNumDeadline); in dmub_psr_copy_settings()336 copy_settings_data->dpphy_inst = psr_context->transmitterId; in dmub_psr_copy_settings()337 copy_settings_data->aux_inst = psr_context->channel; in dmub_psr_copy_settings()338 copy_settings_data->digfe_inst = psr_context->engineId; in dmub_psr_copy_settings()339 copy_settings_data->digbe_inst = psr_context->transmitterId; in dmub_psr_copy_settings()358 copy_settings_data->psr_level = psr_context->psr_level.u32all; in dmub_psr_copy_settings()359 copy_settings_data->smu_optimizations_en = psr_context->allow_smu_optimizations; in dmub_psr_copy_settings()360 copy_settings_data->multi_disp_optimizations_en = psr_context->allow_multi_disp_optimizations; in dmub_psr_copy_settings()[all …]
41 struct psr_context *psr_context, uint8_t panel_inst);
68 struct psr_context *psr_context);
110 struct psr_context psr_context = {0}; in amdgpu_dm_link_setup_psr() local135 ret = dc_link_setup_psr(link, stream, &psr_config, &psr_context); in amdgpu_dm_link_setup_psr()
684 struct psr_context { struct
2529 struct psr_context *psr_context);