| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| H A D | display_mode_vba_util_32.h | 764 double *prefetch_vmrow_bw,
1092 double prefetch_vmrow_bw[],
1137 double prefetch_vmrow_bw[],
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| H A D | display_mode_vba_32.c | 834 &v->Tno_bw[k], &v->prefetch_vmrow_bw[k], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
887 dml_print("DML::%s: k=%0d prefetch_vmrow_bw=%f\n", __func__, k, v->prefetch_vmrow_bw[k]); in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
944 v->prefetch_vmrow_bw, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
977 v->prefetch_vmrow_bw, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1087 v->prefetch_vmrow_bw, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1113 v->prefetch_vmrow_bw, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
3352 &v->prefetch_vmrow_bw[k], in dml32_ModeSupportAndSystemConfigurationFull()
3400 mode_lib->vba.prefetch_vmrow_bw, in dml32_ModeSupportAndSystemConfigurationFull()
3536 mode_lib->vba.prefetch_vmrow_bw, in dml32_ModeSupportAndSystemConfigurationFull()
[all...] |
| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/ |
| H A D | dml2_core_shared_types.h | 566 double prefetch_vmrow_bw[DML2_MAX_PLANES];
729 double prefetch_vmrow_bw[DML2_MAX_PLANES];
1994 double *prefetch_vmrow_bw;
2234 double *prefetch_vmrow_bw;
565 double prefetch_vmrow_bw[DML2_MAX_PLANES]; global() member
728 double prefetch_vmrow_bw[DML2_MAX_PLANES]; global() member
1991 double *prefetch_vmrow_bw; global() member
2231 double *prefetch_vmrow_bw; global() member
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| H A D | dml2_core_dcn4_calcs.c | 4937 double prefetch_vmrow_bw[], in get_urgent_bandwidth_required()
4991 l->vm_row_bw = NumberOfDPP[k] * prefetch_vmrow_bw[k]; in get_urgent_bandwidth_required()
5029 DML_LOG_VERBOSE("DML::%s: k=%d, prefetch_vmrow_bw=%f\n", __func__, k, prefetch_vmrow_bw[k]); in CalculateExtraLatency()
5956 *p->prefetch_vmrow_bw = math_max2(prefetch_vm_bw, prefetch_row_bw); in get_num_lb_source_lines()
5970 *p->prefetch_vmrow_bw = 0; in get_num_lb_source_lines()
5975 DML_LOG_VERBOSE("DML::%s: prefetch_vmrow_bw = %f (final)\n", __func__, *p->prefetch_vmrow_bw); in get_num_lb_source_lines()
6197 l->zero_array, //prefetch_vmrow_bw, in calculate_peak_bandwidth_required()
6234 l->zero_array, //prefetch_vmrow_bw, in calculate_peak_bandwidth_required()
4884 get_urgent_bandwidth_required(struct dml2_core_shared_get_urgent_bandwidth_required_locals * l,const struct dml2_display_cfg * display_cfg,enum dml2_core_internal_soc_state_type state_type,enum dml2_core_internal_bw_type bw_type,bool inc_flip_bw,bool use_qual_row_bw,unsigned int NumberOfActiveSurfaces,unsigned int NumberOfDPP[],double dcc_dram_bw_nom_overhead_factor_p0[],double dcc_dram_bw_nom_overhead_factor_p1[],double dcc_dram_bw_pref_overhead_factor_p0[],double dcc_dram_bw_pref_overhead_factor_p1[],double mall_prefetch_sdp_overhead_factor[],double mall_prefetch_dram_overhead_factor[],double ReadBandwidthLuma[],double ReadBandwidthChroma[],double PrefetchBandwidthLuma[],double PrefetchBandwidthChroma[],double PrefetchBandwidthMax[],double excess_vactive_fill_bw_l[],double excess_vactive_fill_bw_c[],double cursor_bw[],double dpte_row_bw[],double meta_row_bw[],double prefetch_cursor_bw[],double prefetch_vmrow_bw[],double flip_bw[],double UrgentBurstFactorLuma[],double UrgentBurstFactorChroma[],double UrgentBurstFactorCursor[],double UrgentBurstFactorLumaPre[],double UrgentBurstFactorChromaPre[],double UrgentBurstFactorCursorPre[],double surface_required_bw[],double surface_peak_required_bw[]) get_urgent_bandwidth_required() argument
[all...] |
| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/ |
| H A D | display_mode_core_structs.h | 971 dml_float_t prefetch_vmrow_bw[__DML_NUM_PLANES__]; member
1058 dml_float_t prefetch_vmrow_bw[__DML_NUM_PLANES__]; member
1636 dml_float_t *prefetch_vmrow_bw; member
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| H A D | display_mode_core.c | 776 dml_float_t prefetch_vmrow_bw[],
822 dml_float_t prefetch_vmrow_bw[],
1578 *p->prefetch_vmrow_bw = dml_max(prefetch_vm_bw, prefetch_row_bw); in CalculatePrefetchSchedule()
6079 dml_float_t prefetch_vmrow_bw[], in CalculateBandwidthAvailableForImmediateFlip()
6103 *PrefetchBandwidth = *PrefetchBandwidth + dml_max3(NumberOfDPP[k] * prefetch_vmrow_bw[k], in CalculateImmediateFlipBandwithSupport()
6112 + dml_max3(NumberOfDPP[k] * prefetch_vmrow_bw[k], in CalculateImmediateFlipBandwithSupport()
6192 dml_float_t prefetch_vmrow_bw[], in CalculateMaxVStartup()
6213 *TotalBandwidth = *TotalBandwidth + dml_max3(NumberOfDPP[k] * prefetch_vmrow_bw[k], in CalculateMaxVStartup()
6217 *TotalBandwidth = *TotalBandwidth + dml_max3(NumberOfDPP[k] * prefetch_vmrow_bw[k], in CalculateMaxVStartup()
6226 dml_print("DML::%s: prefetch_vmrow_bw in CalculateMaxVStartup()
5987 CalculatePrefetchBandwithSupport(dml_uint_t NumberOfActiveSurfaces,dml_float_t ReturnBW,enum dml_use_mall_for_pstate_change_mode UseMALLForPStateChange[],dml_bool_t NotUrgentLatencyHiding[],dml_float_t ReadBandwidthLuma[],dml_float_t ReadBandwidthChroma[],dml_float_t PrefetchBandwidthLuma[],dml_float_t PrefetchBandwidthChroma[],dml_float_t cursor_bw[],dml_float_t meta_row_bandwidth[],dml_float_t dpte_row_bandwidth[],dml_float_t cursor_bw_pre[],dml_float_t prefetch_vmrow_bw[],dml_uint_t NumberOfDPP[],dml_float_t UrgentBurstFactorLuma[],dml_float_t UrgentBurstFactorChroma[],dml_float_t UrgentBurstFactorCursor[],dml_float_t UrgentBurstFactorLumaPre[],dml_float_t UrgentBurstFactorChromaPre[],dml_float_t UrgentBurstFactorCursorPre[],dml_float_t * PrefetchBandwidth,dml_float_t * PrefetchBandwidthNotIncludingMALLPrefetch,dml_float_t * FractionOfUrgentBandwidth,dml_bool_t * PrefetchBandwidthSupport) CalculatePrefetchBandwithSupport() argument
6100 CalculateImmediateFlipBandwithSupport(dml_uint_t NumberOfActiveSurfaces,dml_float_t ReturnBW,enum dml_use_mall_for_pstate_change_mode UseMALLForPStateChange[],enum dml_immediate_flip_requirement ImmediateFlipRequirement[],dml_float_t final_flip_bw[],dml_float_t ReadBandwidthLuma[],dml_float_t ReadBandwidthChroma[],dml_float_t PrefetchBandwidthLuma[],dml_float_t PrefetchBandwidthChroma[],dml_float_t cursor_bw[],dml_float_t meta_row_bandwidth[],dml_float_t dpte_row_bandwidth[],dml_float_t cursor_bw_pre[],dml_float_t prefetch_vmrow_bw[],dml_uint_t NumberOfDPP[],dml_float_t UrgentBurstFactorLuma[],dml_float_t UrgentBurstFactorChroma[],dml_float_t UrgentBurstFactorCursor[],dml_float_t UrgentBurstFactorLumaPre[],dml_float_t UrgentBurstFactorChromaPre[],dml_float_t UrgentBurstFactorCursorPre[],dml_float_t * TotalBandwidth,dml_float_t * TotalBandwidthNotIncludingMALLPrefetch,dml_float_t * FractionOfUrgentBandwidth,dml_bool_t * ImmediateFlipBandwidthSupport) CalculateImmediateFlipBandwithSupport() argument
[all...] |
| /linux/drivers/gpu/drm/amd/display/dc/dml/ |
| H A D | display_mode_vba.h | 822 double prefetch_vmrow_bw[DC__NUM_DPP__MAX]; member
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