Searched refs:prediv_value (Results 1 – 2 of 2) sorted by relevance
33 unsigned int prediv_value; in imx8m_clk_composite_divider_recalc_rate() local36 prediv_value = readl(divider->reg) >> divider->shift; in imx8m_clk_composite_divider_recalc_rate()37 prediv_value &= clk_div_mask(divider->width); in imx8m_clk_composite_divider_recalc_rate()39 prediv_rate = divider_recalc_rate(hw, parent_rate, prediv_value, in imx8m_clk_composite_divider_recalc_rate()80 int prediv_value; in imx8m_clk_composite_divider_round_rate() local84 &prediv_value, &div_value); in imx8m_clk_composite_divider_round_rate()85 rate = DIV_ROUND_UP(*prate, prediv_value); in imx8m_clk_composite_divider_round_rate()97 int prediv_value; in imx8m_clk_composite_divider_set_rate() local103 &prediv_value, &div_value); in imx8m_clk_composite_divider_set_rate()113 val |= (u32)(prediv_value - 1) << divider->shift; in imx8m_clk_composite_divider_set_rate()[all …]
87 u8 prediv_value; in mtk_hdmi_pll_set_hw() local183 prediv_value = ilog2(prediv); in mtk_hdmi_pll_set_hw()185 mtk_phy_update_field(regs + HDMI_1_PLL_CFG_4, RG_HDMITXPLL_PREDIV, prediv_value); in mtk_hdmi_pll_set_hw()