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Searched refs:pps (Results 1 – 25 of 126) sorted by relevance

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/linux/drivers/pps/
H A Dkapi.c41 static void pps_echo_client_default(struct pps_device *pps, int event, in pps_echo_client_default() argument
44 dev_info(&pps->dev, "echo %s %s\n", in pps_echo_client_default()
68 struct pps_device *pps; in pps_register_source() local
86 pps = kzalloc(sizeof(struct pps_device), GFP_KERNEL); in pps_register_source()
87 if (pps == NULL) { in pps_register_source()
95 pps->params.api_version = PPS_API_VERS; in pps_register_source()
96 pps->params.mode = default_params; in pps_register_source()
97 pps->info = *info; in pps_register_source()
100 if ((pps->info.mode & (PPS_ECHOASSERT | PPS_ECHOCLEAR)) && in pps_register_source()
101 pps->info.echo == NULL) in pps_register_source()
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H A Dsysfs.c21 struct pps_device *pps = dev_get_drvdata(dev); in assert_show() local
23 if (!(pps->info.mode & PPS_CAPTUREASSERT)) in assert_show()
27 (long long) pps->assert_tu.sec, pps->assert_tu.nsec, in assert_show()
28 pps->assert_sequence); in assert_show()
35 struct pps_device *pps = dev_get_drvdata(dev); in clear_show() local
37 if (!(pps->info.mode & PPS_CAPTURECLEAR)) in clear_show()
41 (long long) pps->clear_tu.sec, pps->clear_tu.nsec, in clear_show()
42 pps->clear_sequence); in clear_show()
49 struct pps_device *pps = dev_get_drvdata(dev); in mode_show() local
51 return sprintf(buf, "%4x\n", pps->info.mode); in mode_show()
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H A Dkc.h16 extern int pps_kc_bind(struct pps_device *pps,
18 extern void pps_kc_remove(struct pps_device *pps);
19 extern void pps_kc_event(struct pps_device *pps,
25 static inline int pps_kc_bind(struct pps_device *pps, in pps_kc_bind() argument
27 static inline void pps_kc_remove(struct pps_device *pps) {} in pps_kc_remove() argument
28 static inline void pps_kc_event(struct pps_device *pps, in pps_kc_event() argument
/linux/drivers/gpu/drm/amd/display/dc/dsc/
H A Drc_calc.c40 void calc_rc_params(struct rc_params *rc, const struct drm_dsc_config *pps) in calc_rc_params() argument
46 u16 drm_bpp = pps->bits_per_pixel; in calc_rc_params()
47 int slice_width = pps->slice_width; in calc_rc_params()
48 int slice_height = pps->slice_height; in calc_rc_params()
50 mode = pps->convert_rgb ? CM_RGB : (pps->simple_422 ? CM_444 : in calc_rc_params()
51 (pps->native_422 ? CM_422 : in calc_rc_params()
52 pps->native_420 ? CM_420 : CM_444)); in calc_rc_params()
53 bpc = (pps->bits_per_component == 8) ? BPC_8 : (pps->bits_per_component == 10) in calc_rc_params()
56 is_navite_422_or_420 = pps->native_422 || pps->native_420; in calc_rc_params()
61 pps->dsc_version_minor); in calc_rc_params()
H A Drc_calc_dpi.c98 int dscc_compute_dsc_parameters(const struct drm_dsc_config *pps, in dscc_compute_dsc_parameters() argument
105 dsc_params->pps = *pps; in dscc_compute_dsc_parameters()
106 …dsc_params->pps.initial_scale_value = 8 * rc->rc_model_size / (rc->rc_model_size - rc->initial_ful… in dscc_compute_dsc_parameters()
108 copy_pps_fields(&dsc_cfg, &dsc_params->pps); in dscc_compute_dsc_parameters()
111 dsc_cfg.mux_word_size = dsc_params->pps.bits_per_component <= 10 ? 48 : 64; in dscc_compute_dsc_parameters()
118 copy_pps_fields(&dsc_params->pps, &dsc_cfg); in dscc_compute_dsc_parameters()
H A Ddscc_types.h42 struct drm_dsc_config pps; member
51 int dscc_compute_dsc_parameters(const struct drm_dsc_config *pps,
/linux/drivers/media/platform/allegro-dvt/
H A Dnal-hevc.c430 static void nal_hevc_rbsp_pps(struct rbsp *rbsp, struct nal_hevc_pps *pps) in nal_hevc_rbsp_pps() argument
434 rbsp_uev(rbsp, &pps->pps_pic_parameter_set_id); in nal_hevc_rbsp_pps()
435 rbsp_uev(rbsp, &pps->pps_seq_parameter_set_id); in nal_hevc_rbsp_pps()
436 rbsp_bit(rbsp, &pps->dependent_slice_segments_enabled_flag); in nal_hevc_rbsp_pps()
437 rbsp_bit(rbsp, &pps->output_flag_present_flag); in nal_hevc_rbsp_pps()
438 rbsp_bits(rbsp, 3, &pps->num_extra_slice_header_bits); in nal_hevc_rbsp_pps()
439 rbsp_bit(rbsp, &pps->sign_data_hiding_enabled_flag); in nal_hevc_rbsp_pps()
440 rbsp_bit(rbsp, &pps->cabac_init_present_flag); in nal_hevc_rbsp_pps()
441 rbsp_uev(rbsp, &pps->num_ref_idx_l0_default_active_minus1); in nal_hevc_rbsp_pps()
442 rbsp_uev(rbsp, &pps->num_ref_idx_l1_default_active_minus1); in nal_hevc_rbsp_pps()
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H A Dnal-h264.c283 static void nal_h264_rbsp_pps(struct rbsp *rbsp, struct nal_h264_pps *pps) in nal_h264_rbsp_pps() argument
287 rbsp_uev(rbsp, &pps->pic_parameter_set_id); in nal_h264_rbsp_pps()
288 rbsp_uev(rbsp, &pps->seq_parameter_set_id); in nal_h264_rbsp_pps()
289 rbsp_bit(rbsp, &pps->entropy_coding_mode_flag); in nal_h264_rbsp_pps()
290 rbsp_bit(rbsp, &pps->bottom_field_pic_order_in_frame_present_flag); in nal_h264_rbsp_pps()
291 rbsp_uev(rbsp, &pps->num_slice_groups_minus1); in nal_h264_rbsp_pps()
292 if (pps->num_slice_groups_minus1 > 0) { in nal_h264_rbsp_pps()
293 rbsp_uev(rbsp, &pps->slice_group_map_type); in nal_h264_rbsp_pps()
294 switch (pps->slice_group_map_type) { in nal_h264_rbsp_pps()
296 for (i = 0; i < pps->num_slice_groups_minus1; i++) in nal_h264_rbsp_pps()
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/linux/Documentation/ABI/testing/
H A Dsysfs-pps1 What: /sys/class/pps/
5 The /sys/class/pps/ directory will contain files and
9 What: /sys/class/pps/ppsX/
13 The /sys/class/pps/ppsX/ directory is related to X-th
17 What: /sys/class/pps/ppsX/assert
21 The /sys/class/pps/ppsX/assert file reports the assert events
29 What: /sys/class/pps/ppsX/clear
33 The /sys/class/pps/ppsX/clear file reports the clear events
41 What: /sys/class/pps/ppsX/mode
45 The /sys/class/pps/ppsX/mode file reports the functioning
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/linux/drivers/pps/clients/
H A Dpps-ktimer.c21 static struct pps_device *pps; variable
35 pps_event(pps, &ts, PPS_CAPTUREASSERT, NULL); in pps_ktimer_event()
59 dev_dbg(&pps->dev, "ktimer PPS source unregistered\n"); in pps_ktimer_exit()
62 pps_unregister_source(pps); in pps_ktimer_exit()
67 pps = pps_register_source(&pps_ktimer_info, in pps_ktimer_init()
69 if (IS_ERR(pps)) { in pps_ktimer_init()
71 return PTR_ERR(pps); in pps_ktimer_init()
77 dev_dbg(&pps->dev, "ktimer PPS source registered\n"); in pps_ktimer_init()
H A Dpps-gpio.c29 struct pps_device *pps; /* PPS source device */ member
60 pps_event(info->pps, &ts, PPS_CAPTUREASSERT, data); in pps_gpio_irq_handler()
64 pps_event(info->pps, &ts, PPS_CAPTURECLEAR, data); in pps_gpio_irq_handler()
66 dev_warn_ratelimited(&info->pps->dev, "IRQ did not trigger any PPS event\n"); in pps_gpio_irq_handler()
72 static void pps_gpio_echo(struct pps_device *pps, int event, void *data) in pps_gpio_echo() argument
79 if (pps->params.mode & PPS_ECHOASSERT) in pps_gpio_echo()
84 if (pps->params.mode & PPS_ECHOCLEAR) in pps_gpio_echo()
90 if (info->pps->params.mode & (PPS_ECHOASSERT | PPS_ECHOCLEAR)) { in pps_gpio_echo()
205 data->pps = pps_register_source(&data->info, pps_default_params); in pps_gpio_probe()
206 if (IS_ERR(data->pps)) { in pps_gpio_probe()
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H A DMakefile6 obj-$(CONFIG_PPS_CLIENT_KTIMER) += pps-ktimer.o
7 obj-$(CONFIG_PPS_CLIENT_LDISC) += pps-ldisc.o
9 obj-$(CONFIG_PPS_CLIENT_GPIO) += pps-gpio.o
/linux/samples/bpf/
H A Dxdp_sample_user.c60 #define PPS(pps) pps, "pkt/s" argument
123 __u64 pps; member
137 __u64 pps; member
592 __u64 pps = 0; in calc_pps() local
596 pps = sample_round(packets / period_); in calc_pps()
598 return pps; in calc_pps()
604 __u64 pps = 0; in calc_drop_pps() local
608 pps = sample_round(packets / period_); in calc_drop_pps()
610 return pps; in calc_drop_pps()
616 __u64 pps = 0; in calc_errs_pps() local
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/linux/drivers/staging/media/sunxi/cedrus/
H A Dcedrus_h265.c364 const struct v4l2_ctrl_hevc_pps *pps; in cedrus_h265_write_tiles() local
370 pps = run->h265.pps; in cedrus_h265_write_tiles()
375 for (x = 0, tx = 0; tx < pps->num_tile_columns_minus1 + 1; tx++) { in cedrus_h265_write_tiles()
376 if (x + pps->column_width_minus1[tx] + 1 > ctb_addr_x) in cedrus_h265_write_tiles()
379 x += pps->column_width_minus1[tx] + 1; in cedrus_h265_write_tiles()
382 for (y = 0, ty = 0; ty < pps->num_tile_rows_minus1 + 1; ty++) { in cedrus_h265_write_tiles()
383 if (y + pps->row_height_minus1[ty] + 1 > ctb_addr_y) in cedrus_h265_write_tiles()
386 y += pps->row_height_minus1[ty] + 1; in cedrus_h265_write_tiles()
391 ((y + pps->row_height_minus1[ty]) << 16) | in cedrus_h265_write_tiles()
392 ((x + pps->column_width_minus1[tx]) << 0)); in cedrus_h265_write_tiles()
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H A Dcedrus_h264.c261 const struct v4l2_ctrl_h264_pps *pps = run->h264.pps; in cedrus_write_scaling_lists() local
264 if (!(pps->flags & V4L2_H264_PPS_FLAG_SCALING_MATRIX_PRESENT)) in cedrus_write_scaling_lists()
346 const struct v4l2_ctrl_h264_pps *pps = run->h264.pps; in cedrus_set_params() local
391 if (V4L2_H264_CTRL_PRED_WEIGHTS_REQUIRED(pps, slice)) in cedrus_set_params()
410 reg |= (pps->weighted_bipred_idc & 0x3) << 2; in cedrus_set_params()
411 if (pps->flags & V4L2_H264_PPS_FLAG_ENTROPY_CODING_MODE) in cedrus_set_params()
413 if (pps->flags & V4L2_H264_PPS_FLAG_WEIGHTED_PRED) in cedrus_set_params()
415 if (pps->flags & V4L2_H264_PPS_FLAG_CONSTRAINED_INTRA_PRED) in cedrus_set_params()
417 if (pps->flags & V4L2_H264_PPS_FLAG_TRANSFORM_8X8_MODE) in cedrus_set_params()
466 reg |= (pps->second_chroma_qp_index_offset & 0x3f) << 16; in cedrus_set_params()
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/linux/drivers/media/platform/verisilicon/
H A Dhantro_g1_h264_dec.c27 const struct v4l2_ctrl_h264_pps *pps = ctrls->pps; in set_params() local
58 reg = G1_REG_DEC_CTRL2_CH_QP_OFFSET(pps->chroma_qp_index_offset) | in set_params()
59 G1_REG_DEC_CTRL2_CH_QP_OFFSET2(pps->second_chroma_qp_index_offset); in set_params()
61 if (pps->flags & V4L2_H264_PPS_FLAG_SCALING_MATRIX_PRESENT) in set_params()
69 G1_REG_DEC_CTRL3_INIT_QP(pps->pic_init_qp_minus26 + 26) | in set_params()
76 G1_REG_DEC_CTRL4_WEIGHT_BIPR_IDC(pps->weighted_bipred_idc); in set_params()
77 if (pps->flags & V4L2_H264_PPS_FLAG_ENTROPY_CODING_MODE) in set_params()
83 if (pps->flags & V4L2_H264_PPS_FLAG_WEIGHTED_PRED) in set_params()
90 if (pps->flags & V4L2_H264_PPS_FLAG_CONSTRAINED_INTRA_PRED) in set_params()
92 if (pps->flags & V4L2_H264_PPS_FLAG_DEBLOCKING_FILTER_CONTROL_PRESENT) in set_params()
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H A Drockchip_vpu2_hw_h264_dec.c198 const struct v4l2_ctrl_h264_pps *pps = ctrls->pps; in set_params() local
209 reg = VDPU_REG_INIT_QP(pps->pic_init_qp_minus26 + 26) | in set_params()
261 reg = VDPU_REG_CH_QP_OFFSET2(pps->second_chroma_qp_index_offset) | in set_params()
262 VDPU_REG_CH_QP_OFFSET(pps->chroma_qp_index_offset) | in set_params()
267 reg = VDPU_REG_WEIGHT_BIPR_IDC(pps->weighted_bipred_idc) | in set_params()
271 reg = VDPU_REG_FILT_CTRL_PRES(pps->flags & V4L2_H264_PPS_FLAG_DEBLOCKING_FILTER_CONTROL_PRESENT) | in set_params()
272 VDPU_REG_RDPIC_CNT_PRES(pps->flags & V4L2_H264_PPS_FLAG_REDUNDANT_PIC_CNT_PRESENT) | in set_params()
281 reg = VDPU_REG_PPS_ID(pps->pic_parameter_set_id) | in set_params()
282 VDPU_REG_REFIDX1_ACTIVE(pps->num_ref_idx_l1_default_active_minus1 + 1) | in set_params()
283 VDPU_REG_REFIDX0_ACTIVE(pps->num_ref_idx_l0_default_active_minus1 + 1) | in set_params()
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H A Dhantro_hevc.c80 const struct v4l2_ctrl_hevc_pps *pps = ctrls->pps; in tile_buffer_reallocate() local
82 unsigned int num_tile_cols = pps->num_tile_columns_minus1 + 1; in tile_buffer_reallocate()
203 ctrls->pps = in hantro_hevc_dec_prepare_run()
205 if (WARN_ON(!ctrls->pps)) in hantro_hevc_dec_prepare_run()
/linux/drivers/gpu/drm/i915/display/
H A Dintel_vdsc_regs.h58 #define DSCA_PPS(pps) _MMIO(_DSCA_PPS_0 + ((pps) < 12 ? (pps) : (pps) + 12) * 4) argument
59 #define DSCC_PPS(pps) _MMIO(_DSCC_PPS_0 + ((pps) < 12 ? (pps) : (pps) + 12) * 4) argument
81 #define ICL_DSC0_PPS(pipe, pps) _MMIO(_ICL_DSC0_PPS_0(pipe) + ((pps) * 4)) argument
82 #define ICL_DSC1_PPS(pipe, pps) _MMIO(_ICL_DSC1_PPS_0(pipe) + ((pps) * 4)) argument
83 #define BMG_DSC2_PPS(pipe, pps) _MMIO(_BMG_DSC2_PPS_0(pipe) + ((pps) * 4)) argument
/linux/include/linux/
H A Dpps_kernel.h28 void (*echo)(struct pps_device *pps,
78 extern int pps_register_cdev(struct pps_device *pps);
79 extern void pps_unregister_cdev(struct pps_device *pps);
87 extern void pps_unregister_source(struct pps_device *pps);
88 extern void pps_event(struct pps_device *pps,
/linux/net/netfilter/
H A Dxt_rateest.c26 pps1 = info->pps1 >= sample.pps ? info->pps1 - sample.pps : 0; in xt_rateest_mt()
29 pps1 = sample.pps; in xt_rateest_mt()
40 pps2 = info->pps2 >= sample.pps ? info->pps2 - sample.pps : 0; in xt_rateest_mt()
43 pps2 = sample.pps; in xt_rateest_mt()
/linux/tools/testing/selftests/drivers/net/lib/py/
H A Dload.py90 if not self._wait_pkts(pps=1000):
94 def _wait_pkts(self, pkt_cnt=None, pps=None):
96 Wait until we've seen pkt_cnt or until traffic ramps up to pps.
103 if pps:
104 if pkt_now - pkt_start > pps / 10:
26 _wait_pkts(self, pkt_cnt=None, pps=None) global() argument
/linux/drivers/block/zram/
H A Dzram_drv.c266 static void release_pp_slot(struct zram *zram, struct zram_pp_slot *pps) in release_pp_slot() argument
268 list_del_init(&pps->entry); in release_pp_slot()
270 zram_slot_lock(zram, pps->index); in release_pp_slot()
271 zram_clear_flag(zram, pps->index, ZRAM_PP_SLOT); in release_pp_slot()
272 zram_slot_unlock(zram, pps->index); in release_pp_slot()
274 kfree(pps); in release_pp_slot()
286 struct zram_pp_slot *pps; in release_pp_ctl() local
288 pps = list_first_entry(&ctl->pp_buckets[idx], in release_pp_ctl()
291 release_pp_slot(zram, pps); in release_pp_ctl()
301 struct zram_pp_slot *pps; in place_pp_slot() local
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/linux/drivers/net/ethernet/netronome/nfp/flower/
H A Dqos_conf.c87 bool pps, u32 id, u32 rate, u32 burst) in nfp_flower_offload_one_police() argument
99 if (pps) in nfp_flower_offload_one_police()
180 bool pps; in nfp_flower_install_rate_limiter() local
271 pps = false; in nfp_flower_install_rate_limiter()
273 pps = true; in nfp_flower_install_rate_limiter()
275 pps, netdev_port_id, in nfp_flower_install_rate_limiter()
702 bool pps_support, pps; in nfp_act_install_actions() local
739 pps = false; in nfp_act_install_actions()
741 pps = true; in nfp_act_install_actions()
742 nfp_flower_offload_one_police(app, false, pps, meter_id, in nfp_act_install_actions()
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/linux/include/uapi/linux/
H A Dgen_stats.h38 __u32 pps; member
48 __u64 pps; member

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