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Searched refs:post_div_mask (Results 1 – 20 of 20) sorted by relevance

/linux/drivers/clk/qcom/
H A Dclk-pll.h70 u32 post_div_mask; member
H A Dclk-cpu-8996.c121 .post_div_mask = 0x3 << 8,
223 .post_div_mask = 0x3 << 8,
H A Dclk-alpha-pll.h161 u32 post_div_mask; member
H A Dclk-cbf-8996.c51 .post_div_mask = 0x3 << 8,
H A Dlcc-ipq806x.c53 .post_div_mask = BIT(21) | BIT(20),
H A Dclk-pll.c237 mask |= config->post_div_mask; in clk_pll_configure()
H A Dcamcc-sm7150.c50 .post_div_mask = 0xff << 8,
102 .post_div_mask = 0xf << 8,
210 .post_div_mask = 0xf << 8,
H A Daudiocorecc-shikra.c47 .post_div_mask = GENMASK(17, 8),
H A Dmmcc-msm8974.c2332 .post_div_mask = 0x3 << 8,
2346 .post_div_mask = 0x3 << 8,
H A Dgcc-qcm2290.c310 .post_div_mask = GENMASK(11, 8),
361 .post_div_mask = GENMASK(9, 8),
H A Dmmcc-apq8084.c2801 .post_div_mask = 0x3 << 8,
2815 .post_div_mask = 0x3 << 8,
H A Dcamcc-qcs615.c121 .post_div_mask = 0x3 << 8,
H A Dgcc-sm6115.c368 .post_div_mask = GENMASK(11, 8),
420 .post_div_mask = GENMASK(9, 8),
H A Dgcc-msm8939.c217 .post_div_mask = BIT(9) | BIT(8),
264 .post_div_mask = BIT(9) | BIT(8),
H A Dgcc-shikra.c361 .post_div_mask = GENMASK(11, 8),
415 .post_div_mask = GENMASK(9, 8),
H A Dmmcc-msm8994.c97 .post_div_mask = 0xf00,
H A Dgcc-qcs404.c137 .post_div_mask = 0xf << 8,
H A Dmmcc-msm8960.c87 .post_div_mask = 0x3 << 20,
H A Dnsscc-ipq9574.c72 .post_div_mask = GENMASK(9, 8),
H A Dgcc-msm8976.c166 .post_div_mask = 0x3 << 8,