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Searched refs:pmu_base (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/soc/dove/
H A Dpmu.c33 void __iomem *pmu_base; member
149 void __iomem *pmu_base = pmu->pmu_base; in pmu_domain_power_off() local
157 val &= readl_relaxed(pmu_base + PMU_ISO); in pmu_domain_power_off()
158 writel_relaxed(val, pmu_base + PMU_ISO); in pmu_domain_power_off()
169 val = readl_relaxed(pmu_base + PMU_PWR) | pmu_dom->pwr_mask; in pmu_domain_power_off()
170 writel_relaxed(val, pmu_base + PMU_PWR); in pmu_domain_power_off()
183 void __iomem *pmu_base = pmu->pmu_base; in pmu_domain_power_on() local
189 val = ~pmu_dom->pwr_mask & readl_relaxed(pmu_base + PMU_PWR); in pmu_domain_power_on()
190 writel_relaxed(val, pmu_base + PMU_PWR); in pmu_domain_power_on()
202 val |= readl_relaxed(pmu_base + PMU_ISO); in pmu_domain_power_on()
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/linux/drivers/perf/
H A Dstarfive_starlink_pmu.c74 void __iomem *pmu_base; member
169 writeq(val, starlink_pmu->pmu_base + STARLINK_PMU_CYCLE_COUNTER); in starlink_pmu_set_event_period()
171 writeq(val, starlink_pmu->pmu_base + STARLINK_PMU_EVENT_COUNTER + in starlink_pmu_set_event_period()
191 val = readq(starlink_pmu->pmu_base + STARLINK_PMU_INTERRUPT_ENABLE); in starlink_pmu_counter_start()
200 writeq(event->hw.config, starlink_pmu->pmu_base + in starlink_pmu_counter_start()
206 writeq(val, starlink_pmu->pmu_base + STARLINK_PMU_INTERRUPT_ENABLE); in starlink_pmu_counter_start()
208 writeq(STARLINK_PMU_GLOBAL_ENABLE, starlink_pmu->pmu_base + in starlink_pmu_counter_start()
219 val = readq(starlink_pmu->pmu_base + STARLINK_PMU_CONTROL); in starlink_pmu_counter_stop()
221 writeq(val, starlink_pmu->pmu_base + STARLINK_PMU_CONTROL); in starlink_pmu_counter_stop()
223 val = readq(starlink_pmu->pmu_base + STARLINK_PMU_INTERRUPT_ENABLE); in starlink_pmu_counter_stop()
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H A Darm-cmn.c130 #define CMN_DT_PMEVCNT(dtc, n) ((dtc)->pmu_base + _CMN_DT_CNT_REG(n))
131 #define CMN_DT_PMCCNTR(dtc) ((dtc)->pmu_base + 0x40)
133 #define CMN_DT_PMEVCNTSR(dtc, n) ((dtc)->pmu_base + 0x50 + _CMN_DT_CNT_REG(n))
134 #define CMN_DT_PMCCNTRSR(dtc) ((dtc)->pmu_base + 0x90)
136 #define CMN_DT_PMCR(dtc) ((dtc)->pmu_base + 0x100)
141 #define CMN_DT_PMOVSR(dtc) ((dtc)->pmu_base + 0x118)
142 #define CMN_DT_PMOVSR_CLR(dtc) ((dtc)->pmu_base + 0x120)
144 #define CMN_DT_PMSSR(dtc) ((dtc)->pmu_base + 0x128)
147 #define CMN_DT_PMSRR(dtc) ((dtc)->pmu_base + 0x130)
286 void __iomem *pmu_base; member
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/linux/arch/arm/mach-rockchip/
H A Dplatsmp.c211 void __iomem *pmu_base; in rockchip_smp_prepare_pmu() local
238 pmu_base = of_iomap(node, 0); in rockchip_smp_prepare_pmu()
240 if (!pmu_base) { in rockchip_smp_prepare_pmu()
245 pmu = regmap_init_mmio(NULL, pmu_base, &rockchip_pmu_regmap_config); in rockchip_smp_prepare_pmu()
249 iounmap(pmu_base); in rockchip_smp_prepare_pmu()
/linux/drivers/pinctrl/mvebu/
H A Dpinctrl-dove.c60 static void __iomem *pmu_base; variable
74 func = readl(pmu_base + PMU_SIGNAL_SELECT_0 + off); in dove_pmu_mpp_ctrl_get()
95 func = readl(pmu_base + PMU_SIGNAL_SELECT_0 + off); in dove_pmu_mpp_ctrl_set()
98 writel(func, pmu_base + PMU_SIGNAL_SELECT_0 + off); in dove_pmu_mpp_ctrl_set()
828 pmu_base = devm_ioremap_resource(&pdev->dev, res); in dove_pinctrl_probe()
829 if (IS_ERR(pmu_base)) { in dove_pinctrl_probe()
830 ret = PTR_ERR(pmu_base); in dove_pinctrl_probe()
/linux/drivers/soc/samsung/
H A Dgs101-pmu.c346 unsigned long pmu_base = (unsigned long)context; in tensor_sec_reg_write() local
348 arm_smccc_smc(TENSOR_SMC_PMU_SEC_REG, pmu_base + reg, in tensor_sec_reg_write()
363 unsigned long pmu_base = (unsigned long)context; in tensor_sec_reg_rmw() local
365 arm_smccc_smc(TENSOR_SMC_PMU_SEC_REG, pmu_base + reg, in tensor_sec_reg_rmw()
/linux/include/linux/soc/dove/
H A Dpmu.h16 void __iomem *pmu_base; member
/linux/arch/arm/mach-dove/
H A Dcommon.c409 .pmu_base = DOVE_PMU_VIRT_BASE + 0x8000,