Searched refs:pllclk (Results 1 – 3 of 3) sorted by relevance
408 struct clk *pllclk; in jh7110_syscrg_probe() local424 pllclk = clk_get(priv->dev, "pll0_out"); in jh7110_syscrg_probe()425 if (IS_ERR(pllclk)) { in jh7110_syscrg_probe()433 ret = clk_notifier_register(pllclk, &priv->pll_clk_nb); in jh7110_syscrg_probe()439 pllclk = clk_get(priv->dev, "pll1_out"); in jh7110_syscrg_probe()440 if (IS_ERR(pllclk)) { in jh7110_syscrg_probe()447 clk_put(pllclk); in jh7110_syscrg_probe()451 pllclk = clk_get(priv->dev, "pll2_out"); in jh7110_syscrg_probe()452 if (IS_ERR(pllclk)) { in jh7110_syscrg_probe()459 clk_put(pllclk); in jh7110_syscrg_probe()
350 <&pllclk JH7110_PLLCLK_PLL0_OUT>;351 assigned-clock-parents = <&pllclk JH7110_PLLCLK_PLL0_OUT>,352 <&pllclk JH7110_PLLCLK_PLL2_OUT>,353 <&pllclk JH7110_PLLCLK_PLL2_OUT>,
961 <&pllclk JH7110_PLLCLK_PLL0_OUT>,962 <&pllclk JH7110_PLLCLK_PLL1_OUT>,963 <&pllclk JH7110_PLLCLK_PLL2_OUT>;978 pllclk: clock-controller {915 pllclk: clock-controller { global() label