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Searched refs:plla (Results 1 – 6 of 6) sorted by relevance

/linux/arch/arm/boot/dts/vt8500/
H A Dwm8650.dtsi85 plla: plla { label
123 clocks = <&plla>;
H A Dwm8505.dtsi88 plla: plla { label
119 clocks = <&plla>;
H A Dwm8850.dtsi88 plla: plla { label
140 clocks = <&plla>;
H A Dwm8750.dtsi91 plla: plla { label
129 clocks = <&plla>;
/linux/Documentation/devicetree/bindings/clock/
H A Dvt8500.txt59 plla: plla {
/linux/drivers/clk/tegra/
H A Dclk-tegra210.c831 static void tegra210_plla_set_defaults(struct tegra_clk_pll *plla) in tegra210_plla_set_defaults() argument
834 u32 val = readl_relaxed(clk_base + plla->params->base_reg); in tegra210_plla_set_defaults()
836 plla->params->defaults_set = true; in tegra210_plla_set_defaults()
845 plla->params->defaults_set = false; in tegra210_plla_set_defaults()
852 _pll_misc_chk_default(clk_base, plla->params, 0, val, in tegra210_plla_set_defaults()
856 _pll_misc_chk_default(clk_base, plla->params, 2, val, in tegra210_plla_set_defaults()
860 val = readl_relaxed(clk_base + plla->params->ext_misc_reg[0]); in tegra210_plla_set_defaults()
863 writel_relaxed(val, clk_base + plla->params->ext_misc_reg[0]); in tegra210_plla_set_defaults()
871 writel_relaxed(val, clk_base + plla->params->base_reg); in tegra210_plla_set_defaults()
873 clk_base + plla->params->ext_misc_reg[0]); in tegra210_plla_set_defaults()
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