Searched refs:pll_settings (Results 1 – 14 of 14) sorted by relevance
197 struct pll_settings *pll_settings, in calc_fb_divider_checking_tolerance() argument210 pll_settings->adjusted_pix_clk_100hz, in calc_fb_divider_checking_tolerance()229 pll_settings->adjusted_pix_clk_100hz) in calc_fb_divider_checking_tolerance()231 pll_settings->adjusted_pix_clk_100hz in calc_fb_divider_checking_tolerance()232 : pll_settings->adjusted_pix_clk_100hz - in calc_fb_divider_checking_tolerance()237 pll_settings->reference_freq = calc_pll_cs->ref_freq_khz; in calc_fb_divider_checking_tolerance()238 pll_settings->reference_divider = ref_divider; in calc_fb_divider_checking_tolerance()239 pll_settings->feedback_divider = feedback_divider; in calc_fb_divider_checking_tolerance()240 pll_settings->fract_feedback_divider = fract_feedback_divider; in calc_fb_divider_checking_tolerance()241 pll_settings->pix_clk_post_divider = post_divider; in calc_fb_divider_checking_tolerance()[all …]
107 struct pll_settings { struct168 struct pll_settings *);172 struct pll_settings *);
462 struct pll_settings pll_settings; member
1457 pipe_ctx->pll_settings.ss_percentage; in build_audio_output()1532 &pipe_ctx->pll_settings)) { in dce110_enable_stream_timing()3315 &pipes[i].pll_settings); in dce110_enable_dp_link_output()
1038 &pipe_ctx->pll_settings); in build_pipe_hw_param()
928 &pipe_ctx->pll_settings); in dce110_resource_build_pipe_hw_param()
552 &otg_master->pll_settings); in dcn401_update_clocks_update_dtb_dto()
1394 &pipe_ctx->pll_settings); in apply_symclk_on_tx_off_wa()
1744 &pipe_ctx->pll_settings); in disable_link_output_symclk_on_tx_off()
819 &pipe_ctx->pll_settings)) { in dcn401_enable_stream_timing()1037 &pipe_ctx->pll_settings); in disable_link_output_symclk_on_tx_off()
1773 &pipe_ctx->pll_settings); in dcn401_build_pipe_pix_clk_params()
1289 &pipe_ctx->pll_settings); in dcn20_build_pipe_pix_clk_params()
875 &pipe_ctx->pll_settings)) { in dcn20_enable_stream_timing()
1206 &pipe_ctx->pll_settings)) { in dcn10_enable_stream_timing()