Searched refs:pll_info (Results 1 – 8 of 8) sorted by relevance
| /linux/drivers/clk/ingenic/ |
| H A D | cgu.c | 85 const struct ingenic_cgu_pll_info *pll_info; in ingenic_pll_recalc_rate() local
91 pll_info = &clk_info->pll; in ingenic_pll_recalc_rate()
93 ctl = readl(cgu->base + pll_info->reg); in ingenic_pll_recalc_rate()
95 m = (ctl >> pll_info->m_shift) & GENMASK(pll_info->m_bits - 1, 0); in ingenic_pll_recalc_rate()
96 m += pll_info->m_offset; in ingenic_pll_recalc_rate()
97 n = (ctl >> pll_info->n_shift) & GENMASK(pll_info->n_bits - 1, 0); in ingenic_pll_recalc_rate()
98 n += pll_info->n_offset; in ingenic_pll_recalc_rate()
100 if (pll_info->od_bits > 0) { in ingenic_pll_recalc_rate()
101 od_enc = ctl >> pll_info->od_shift; in ingenic_pll_recalc_rate()
102 od_enc &= GENMASK(pll_info->od_bits - 1, 0); in ingenic_pll_recalc_rate()
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| H A D | x1000-cgu.c | 174 x1000_i2spll_calc_m_n_od(const struct ingenic_cgu_pll_info *pll_info, in x1000_i2spll_calc_m_n_od() argument
178 const unsigned long m_max = GENMASK(pll_info->m_bits - 1, 0); in x1000_i2spll_calc_m_n_od()
179 const unsigned long n_max = GENMASK(pll_info->n_bits - 1, 0); in x1000_i2spll_calc_m_n_od()
194 x1000_i2spll_set_rate_hook(const struct ingenic_cgu_pll_info *pll_info, in x1000_i2spll_set_rate_hook() argument
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| H A D | jz4760-cgu.c | 57 jz4760_cgu_calc_m_n_od(const struct ingenic_cgu_pll_info *pll_info, in jz4760_cgu_calc_m_n_od() argument
61 unsigned int m, n, od, m_max = (1 << pll_info->m_bits) - 1; in jz4760_cgu_calc_m_n_od()
67 n = clamp_val(n, 2, 1 << pll_info->n_bits); in jz4760_cgu_calc_m_n_od()
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| /linux/drivers/clk/visconti/ |
| H A D | pll-tmpv770x.c | 56 static const struct visconti_pll_info pll_info[] __initconst = { variable
85 visconti_register_plls(ctx, pll_info, ARRAY_SIZE(pll_info), &tmpv770x_pll_lock); in tmpv770x_setup_plls()
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| /linux/drivers/gpu/drm/amd/display/dc/inc/hw/ |
| H A D | audio.h | 54 const struct audio_pll_info *pll_info);
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| /linux/drivers/video/fbdev/aty/ |
| H A D | atyfb.h | 49 struct pll_info { struct
140 struct pll_info pll_limits;
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| H A D | radeonfb.h | 138 struct pll_info { struct
342 struct pll_info pll;
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn201/ |
| H A D | dcn201_hwseq.c | 244 dc->ctx->dc_bios->fw_info.pll_info.crystal_frequency; in dcn201_init_hw()
248 dc->ctx->dc_bios->fw_info.pll_info.crystal_frequency, in dcn201_init_hw()
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