| /linux/drivers/clk/ingenic/ |
| H A D | cgu.c | 85 const struct ingenic_cgu_pll_info *pll_info; in ingenic_pll_recalc_rate() local
91 pll_info = &clk_info->pll; in ingenic_pll_recalc_rate()
93 ctl = readl(cgu->base + pll_info->reg); in ingenic_pll_recalc_rate()
95 m = (ctl >> pll_info->m_shift) & GENMASK(pll_info->m_bits - 1, 0); in ingenic_pll_recalc_rate()
96 m += pll_info->m_offset; in ingenic_pll_recalc_rate()
97 n = (ctl >> pll_info->n_shift) & GENMASK(pll_info->n_bits - 1, 0); in ingenic_pll_recalc_rate()
98 n += pll_info->n_offset; in ingenic_pll_recalc_rate()
100 if (pll_info->od_bits > 0) { in ingenic_pll_recalc_rate()
101 od_enc = ctl >> pll_info->od_shift; in ingenic_pll_recalc_rate()
102 od_enc &= GENMASK(pll_info->od_bits - 1, 0); in ingenic_pll_recalc_rate()
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| H A D | x1000-cgu.c | 174 x1000_i2spll_calc_m_n_od(const struct ingenic_cgu_pll_info *pll_info, in x1000_i2spll_calc_m_n_od() argument
178 const unsigned long m_max = GENMASK(pll_info->m_bits - 1, 0); in x1000_i2spll_calc_m_n_od()
179 const unsigned long n_max = GENMASK(pll_info->n_bits - 1, 0); in x1000_i2spll_calc_m_n_od()
194 x1000_i2spll_set_rate_hook(const struct ingenic_cgu_pll_info *pll_info, in x1000_i2spll_set_rate_hook() argument
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| H A D | jz4760-cgu.c | 57 jz4760_cgu_calc_m_n_od(const struct ingenic_cgu_pll_info *pll_info, in jz4760_cgu_calc_m_n_od() argument
61 unsigned int m, n, od, m_max = (1 << pll_info->m_bits) - 1; in jz4760_cgu_calc_m_n_od()
67 n = clamp_val(n, 2, 1 << pll_info->n_bits); in jz4760_cgu_calc_m_n_od()
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| /linux/drivers/clk/visconti/ |
| H A D | pll-tmpv770x.c | 56 static const struct visconti_pll_info pll_info[] __initconst = { variable
85 visconti_register_plls(ctx, pll_info, ARRAY_SIZE(pll_info), &tmpv770x_pll_lock); in tmpv770x_setup_plls()
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| /linux/drivers/gpu/drm/radeon/ |
| H A D | radeon_combios.c | 717 uint16_t pll_info; in radeon_combios_get_clock_info() local
725 pll_info = combios_get_table_offset(dev, COMBIOS_PLL_INFO_TABLE); in radeon_combios_get_clock_info()
726 if (pll_info) { in radeon_combios_get_clock_info()
727 rev = RBIOS8(pll_info); in radeon_combios_get_clock_info()
730 p1pll->reference_freq = RBIOS16(pll_info + 0xe); in radeon_combios_get_clock_info()
731 p1pll->reference_div = RBIOS16(pll_info + 0x10); in radeon_combios_get_clock_info()
732 p1pll->pll_out_min = RBIOS32(pll_info + 0x12); in radeon_combios_get_clock_info()
733 p1pll->pll_out_max = RBIOS32(pll_info + 0x16); in radeon_combios_get_clock_info()
738 p1pll->pll_in_min = RBIOS32(pll_info + 0x36); in radeon_combios_get_clock_info()
739 p1pll->pll_in_max = RBIOS32(pll_info + 0x3a); in radeon_combios_get_clock_info()
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| /linux/drivers/gpu/drm/amd/display/dc/inc/hw/ |
| H A D | audio.h | 54 const struct audio_pll_info *pll_info);
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| /linux/drivers/gpu/drm/amd/display/dc/bios/ |
| H A D | bios_parser.c | 436 info->pll_info.crystal_frequency = in get_firmware_info_v1_4()
438 info->pll_info.min_input_pxl_clk_pll_frequency = in get_firmware_info_v1_4()
440 info->pll_info.max_input_pxl_clk_pll_frequency = in get_firmware_info_v1_4()
442 info->pll_info.min_output_pxl_clk_pll_frequency = in get_firmware_info_v1_4()
444 info->pll_info.max_output_pxl_clk_pll_frequency = in get_firmware_info_v1_4()
488 info->pll_info.crystal_frequency = in get_firmware_info_v2_1()
490 info->pll_info.min_input_pxl_clk_pll_frequency = in get_firmware_info_v2_1()
492 info->pll_info.max_input_pxl_clk_pll_frequency = in get_firmware_info_v2_1()
494 info->pll_info.min_output_pxl_clk_pll_frequency = in get_firmware_info_v2_1()
496 info->pll_info.max_output_pxl_clk_pll_frequency = in get_firmware_info_v2_1()
[all …]
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| /linux/drivers/gpu/drm/amd/display/include/ |
| H A D | audio_types.h | 112 struct audio_pll_info pll_info; member
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| H A D | grph_object_ctrl_defs.h | 163 struct pll_info { struct
169 } pll_info; member
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| /linux/drivers/video/fbdev/aty/ |
| H A D | atyfb.h | 49 struct pll_info { struct
140 struct pll_info pll_limits;
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| H A D | radeonfb.h | 138 struct pll_info { struct
342 struct pll_info pll;
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| /linux/drivers/gpu/drm/amd/display/dc/dce/ |
| H A D | dce_clock_source.c | 1605 calc_pll_cs->ref_freq_khz = fw_info->pll_info.crystal_frequency; in calc_pll_max_vco_construct()
1607 fw_info->pll_info.min_output_pxl_clk_pll_frequency; in calc_pll_max_vco_construct()
1609 fw_info->pll_info.max_output_pxl_clk_pll_frequency; in calc_pll_max_vco_construct()
1616 fw_info->pll_info.max_input_pxl_clk_pll_frequency; in calc_pll_max_vco_construct()
1623 fw_info->pll_info.min_input_pxl_clk_pll_frequency; in calc_pll_max_vco_construct()
1732 clk_src->ref_freq_khz = clk_src->bios->fw_info.pll_info.crystal_frequency; in dce110_clk_src_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn201/ |
| H A D | dcn201_hwseq.c | 244 dc->ctx->dc_bios->fw_info.pll_info.crystal_frequency; in dcn201_init_hw()
248 dc->ctx->dc_bios->fw_info.pll_info.crystal_frequency, in dcn201_init_hw()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dce110/ |
| H A D | dce110_hwseq.c | 1511 audio_output->pll_info.audio_dto_source_clock_in_khz = in build_audio_output()
1516 audio_output->pll_info.dto_source = in build_audio_output()
1521 audio_output->pll_info.ss_enabled = true; in build_audio_output()
1523 audio_output->pll_info.ss_percentage = in build_audio_output()
2501 &audio_output.pll_info); in dce110_setup_audio_dto()
2507 &audio_output.pll_info); in dce110_setup_audio_dto()
2535 &audio_output.pll_info); in dce110_setup_audio_dto()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn401/ |
| H A D | dcn401_hwseq.c | 179 dc->ctx->dc_bios->fw_info.pll_info.crystal_frequency; in dcn401_init_hw()
183 dc->ctx->dc_bios->fw_info.pll_info.crystal_frequency, in dcn401_init_hw()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| H A D | dcn32_fpu.c | 3109 …dc->dml2_options.bbox_overrides.xtalclk_mhz = dc->ctx->dc_bios->fw_info.pll_info.crystal_frequency… in dcn32_update_bw_bounding_box_fpu()
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| /linux/drivers/gpu/drm/amd/display/dc/core/ |
| H A D | dc_resource.c | 386 dc->ctx->dc_bios->fw_info.pll_info.crystal_frequency; in dc_create_resource_pool()
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