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Searched refs:pll_en_bit (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/clk/mediatek/
H A Dclk-pll.c37 return (readl(pll->en_addr) & BIT(pll->data->pll_en_bit)) != 0; in mtk_pll_is_prepared()
228 r = readl(pll->en_addr) | BIT(pll->data->pll_en_bit); in mtk_pll_prepare()
267 r = readl(pll->en_addr) & ~BIT(pll->data->pll_en_bit); in mtk_pll_unprepare()
H A Dclk-mt8195-apusys_pll.c49 .pll_en_bit = MT8195_PLL_EN_BIT, \
H A Dclk-pll.h50 u8 pll_en_bit; /* Assume 0, indicates BIT(0) by default */ member
H A Dclk-mt8188-apmixedsys.c57 .pll_en_bit = _pll_en_bit, \
H A Dclk-mt8186-apmixedsys.c43 .pll_en_bit = 0, \
H A Dclk-mt6795-apmixedsys.c43 .pll_en_bit = 0, \
H A Dclk-mt8192-apmixedsys.c60 .pll_en_bit = _pll_en_bit, \
H A Dclk-mt8195-apmixedsys.c58 .pll_en_bit = _pll_en_bit, \