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Searched refs:pll8 (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/i915/display/
H A Dintel_dpll_mgr.h209 u32 ebb0, ebb4, pll0, pll1, pll2, pll3, pll6, pll8, pll9, pll10, pcsdw12; member
H A Dintel_dpll_mgr.c2097 PORT_PLL_TARGET_CNT_MASK, hw_state->pll8); in bxt_ddi_pll_enable()
2209 hw_state->pll8 = intel_de_read(i915, BXT_PORT_PLL(phy, ch, 8)); in bxt_ddi_pll_get_hw_state()
2210 hw_state->pll8 &= PORT_PLL_TARGET_CNT_MASK; in bxt_ddi_pll_get_hw_state()
2347 hw_state->pll8 = PORT_PLL_TARGET_CNT(targ_cnt); in bxt_ddi_set_dpll_hw_state()
2466 hw_state->pll6, hw_state->pll8, hw_state->pll9, hw_state->pll10, in bxt_dump_hw_state()
2483 a->pll8 == b->pll8 && in bxt_compare_hw_state()
/linux/drivers/clk/qcom/
H A Dgcc-mdm9615.c89 static struct clk_pll pll8 = { variable
111 &pll8.clkr.hw,
1618 [PLL8] = &pll8.clkr,
H A Dgcc-msm8660.c26 static struct clk_pll pll8 = { variable
50 &pll8.clkr.hw
2512 [PLL8] = &pll8.clkr,
H A Dgcc-msm8960.c60 static struct clk_pll pll8 = { variable
84 &pll8.clkr.hw
3245 [PLL8] = &pll8.clkr,
3473 [PLL8] = &pll8.clkr,
H A Dgcc-ipq806x.c90 static struct clk_pll pll8 = { variable
112 &pll8.clkr.hw,
3071 [PLL8] = &pll8.clkr,