| /linux/drivers/gpu/drm/i915/display/ |
| H A D | intel_sprite_regs.h | 230 #define _VLV_SPR(pipe, plane_id, reg_a, reg_b) \ argument
231 _PIPE((pipe) * 2 + (plane_id) - PLANE_SPRITE0, (reg_a), (reg_b))
232 #define _MMIO_VLV_SPR(pipe, plane_id, reg_a, reg_b) \ argument
233 _MMIO(_VLV_SPR((pipe), (plane_id), (reg_a), (reg_b)))
237 #define SPCNTR(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPACNTR, _SPBCNTR) argument
266 #define SPLINOFF(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPALINOFF, _SPBLINOFF) argument
270 #define SPSTRIDE(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPASTRIDE, _SPBSTRIDE) argument
274 #define SPPOS(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPAPOS, _SPBPOS) argument
282 #define SPSIZE(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPASIZE, _SPBSIZE) argument
290 #define SPKEYMINVAL(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPAKEYMINVAL, _SPBKEYMINVAL) argument
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| H A D | intel_dbuf_bw.c | 99 enum plane_id plane_id, in skl_plane_calc_dbuf_bw() argument
113 dbuf_bw->active_planes[slice] |= BIT(plane_id); in skl_plane_calc_dbuf_bw()
122 enum plane_id plane_id; in skl_crtc_calc_dbuf_bw() local
129 for_each_plane_id_on_crtc(crtc, plane_id) { in skl_crtc_calc_dbuf_bw()
134 if (plane_id == PLANE_CURSOR) in skl_crtc_calc_dbuf_bw()
137 skl_plane_calc_dbuf_bw(dbuf_bw, crtc, plane_id, in skl_crtc_calc_dbuf_bw()
138 &crtc_state->wm.skl.plane_ddb[plane_id], in skl_crtc_calc_dbuf_bw()
139 crtc_state->data_rate[plane_id]); in skl_crtc_calc_dbuf_bw()
142 skl_plane_calc_dbuf_bw(dbuf_bw, crtc, plane_id, in skl_crtc_calc_dbuf_bw()
143 &crtc_state->wm.skl.plane_ddb_y[plane_id], in skl_crtc_calc_dbuf_bw()
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| H A D | intel_plane.c | 773 intel_crtc_get_plane(struct intel_crtc *crtc, enum plane_id plane_id) in intel_crtc_get_plane() argument
779 if (plane->id == plane_id) in intel_crtc_get_plane()
852 enum plane_id plane_id = plane->id; in skl_next_plane_to_commit() local
855 !(*update_mask & BIT(plane_id))) in skl_next_plane_to_commit()
858 if (skl_ddb_allocation_overlaps(&crtc_state->wm.skl.plane_ddb[plane_id], in skl_next_plane_to_commit()
859 ddb, I915_MAX_PLANES, plane_id) || in skl_next_plane_to_commit()
860 skl_ddb_allocation_overlaps(&crtc_state->wm.skl.plane_ddb_y[plane_id], in skl_next_plane_to_commit()
861 ddb_y, I915_MAX_PLANES, plane_id)) in skl_next_plane_to_commit()
864 *update_mask &= ~BIT(plane_id); in skl_next_plane_to_commit()
865 ddb[plane_id] = crtc_state->wm.skl.plane_ddb[plane_id]; in skl_next_plane_to_commit()
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| H A D | intel_display_types.h | 1583 enum plane_id id;
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| H A D | intel_color.c | 3858 enum plane_id plane = to_intel_plane(state->plane)->id; in xelpd_load_plane_csc_matrix()
3953 enum plane_id plane = to_intel_plane(state->plane)->id; in xelpd_program_plane_pre_csc_lut()
4006 enum plane_id plane = to_intel_plane(state->plane)->id; in xelpd_program_plane_post_csc_lut()
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| /linux/drivers/gpu/drm/sti/ |
| H A D | sti_mixer.c | 239 int plane_id, depth = plane->drm_plane.state->normalized_zpos; in sti_mixer_set_plane_depth() local
245 plane_id = GAM_DEPTH_GDP0_ID; in sti_mixer_set_plane_depth()
248 plane_id = GAM_DEPTH_GDP1_ID; in sti_mixer_set_plane_depth()
251 plane_id = GAM_DEPTH_GDP2_ID; in sti_mixer_set_plane_depth()
254 plane_id = GAM_DEPTH_GDP3_ID; in sti_mixer_set_plane_depth()
257 plane_id = GAM_DEPTH_VID0_ID; in sti_mixer_set_plane_depth()
271 if ((val & mask) == plane_id << (3 * i)) in sti_mixer_set_plane_depth()
276 plane_id = plane_id << (3 * depth); in sti_mixer_set_plane_depth()
281 plane_id, mask); in sti_mixer_set_plane_depth()
284 val |= plane_id; in sti_mixer_set_plane_depth()
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/ |
| H A D | dml2_dc_resource_mgmt.c | 59 unsigned int stream_id, unsigned int plane_index, unsigned int *plane_id) in get_plane_id() argument
64 if (!plane_id) in get_plane_id()
72 *plane_id = (i << 16) | j; in get_plane_id()
82 …t find_disp_cfg_idx_by_plane_id(struct dml2_dml_to_dc_pipe_mapping *mapping, unsigned int plane_id) in find_disp_cfg_idx_by_plane_id() argument
87 if (mapping->disp_cfg_to_plane_id_valid[i] && mapping->disp_cfg_to_plane_id[i] == plane_id) in find_disp_cfg_idx_by_plane_id()
124 struct dc_state *state, unsigned int plane_id) in find_master_pipe_of_plane() argument
133 if (plane_id_assigned_to_pipe == plane_id) in find_master_pipe_of_plane()
142 struct dc_state *state, unsigned int plane_id, unsigned int *pipes) in find_pipes_assigned_to_plane() argument
157 if (plane_id_assigned_to_pipe == plane_id && !pipe->prev_odm_pipe in find_pipes_assigned_to_plane()
661 unsigned int plane_id; in assign_pipes_to_plane() local
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| H A D | dml2_utils.c | 205 static int find_dml_pipe_idx_by_plane_id(struct dml2_context *ctx, unsigned int plane_id) in find_dml_pipe_idx_by_plane_id() argument
209 …ane_id_valid[i] && ctx->v20.scratch.dml_to_dc_pipe_mapping.dml_pipe_idx_to_plane_id[i] == plane_id) in find_dml_pipe_idx_by_plane_id()
217 unsigned int stream_id, unsigned int plane_index, unsigned int *plane_id) in get_plane_id() argument
222 if (!plane_id) in get_plane_id()
230 *plane_id = (i << 16) | j; in get_plane_id()
282 unsigned int dc_pipe_ctx_index, dml_pipe_idx, plane_id; in dml2_calculate_rq_and_dlg_params() local
308 …g.dml_pipe_idx_to_plane_index[context->res_ctx.pipe_ctx[dc_pipe_ctx_index].pipe_idx], &plane_id)) { in dml2_calculate_rq_and_dlg_params()
309 dml_pipe_idx = find_dml_pipe_idx_by_plane_id(in_ctx, plane_id); in dml2_calculate_rq_and_dlg_params()
515 unsigned int i = 0, dml_pipe_idx = 0, plane_id = 0; in dml2_verify_det_buffer_configuration() local
526 …_pipe_mapping.dml_pipe_idx_to_plane_index[display_state->res_ctx.pipe_ctx[i].pipe_idx], &plane_id)) in dml2_verify_det_buffer_configuration()
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| H A D | dml2_translation_helper.c | 1155 unsigned int stream_id, unsigned int plane_index, unsigned int *plane_id) in get_plane_id() argument
1160 if (!plane_id) in get_plane_id()
1168 *plane_id = (i << 16) | j; in get_plane_id()
1182 unsigned int plane_id; in map_plane_to_dml_display_cfg() local
1186 if (!get_plane_id(context->bw_ctx.dml2, context, plane, stream_id, plane_index, &plane_id)) { in map_plane_to_dml_display_cfg()
1192 …lane_id_valid[i] && dml2->v20.scratch.dml_to_dc_pipe_mapping.disp_cfg_to_plane_id[i] == plane_id) { in map_plane_to_dml_display_cfg()
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/ |
| H A D | dml21_utils.c | 25 int dml21_find_dml_pipe_idx_by_plane_id(struct dml2_context *ctx, unsigned int plane_id) in dml21_find_dml_pipe_idx_by_plane_id() argument
29 …dx_to_plane_id_valid[i] && ctx->v21.dml_to_dc_pipe_mapping.dml_pipe_idx_to_plane_id[i] == plane_id) in dml21_find_dml_pipe_idx_by_plane_id()
36 …_plane_id(const struct dc_state *state, const struct dc_plane_state *plane, unsigned int *plane_id) in dml21_get_plane_id() argument
40 if (!plane_id) in dml21_get_plane_id()
46 *plane_id = (i << 16) | j; in dml21_get_plane_id()
55 unsigned int dml21_get_dc_plane_idx_from_plane_id(unsigned int plane_id) in dml21_get_dc_plane_idx_from_plane_id() argument
57 return 0xffff & plane_id; in dml21_get_dc_plane_idx_from_plane_id()
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| H A D | dml21_translation_helper.c | 665 …state *context, unsigned int stream_id, const struct dc_plane_state *plane, unsigned int *plane_id) in dml21_wrapper_get_plane_id() argument
669 if (!plane_id) in dml21_wrapper_get_plane_id()
676 *plane_id = (i << 16) | j; in dml21_wrapper_get_plane_id()
704 unsigned int plane_id; in map_plane_to_dml21_display_cfg() local
708 if (!dml21_wrapper_get_plane_id(context, stream_id, plane, &plane_id)) { in map_plane_to_dml21_display_cfg()
714 …_to_plane_id_valid[i] && dml_ctx->v21.dml_to_dc_pipe_mapping.disp_cfg_to_plane_id[i] == plane_id) { in map_plane_to_dml21_display_cfg()
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| /linux/drivers/gpu/drm/i915/gvt/ |
| H A D | dmabuf.c | 258 int plane_id) in vgpu_get_plane_info() argument
266 if (plane_id == DRM_PLANE_TYPE_PRIMARY) { in vgpu_get_plane_info()
296 } else if (plane_id == DRM_PLANE_TYPE_CURSOR) { in vgpu_get_plane_info()
318 gvt_vgpu_err("invalid plane id:%d\n", plane_id); in vgpu_get_plane_info()
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| /linux/drivers/gpu/drm/ |
| H A D | drm_plane.c | 863 plane = drm_plane_find(dev, file_priv, plane_resp->plane_id); in drm_mode_getplane()
883 plane_resp->plane_id = plane->base.id; in drm_mode_getplane()
1151 plane = drm_plane_find(dev, file_priv, plane_req->plane_id); in drm_mode_setplane()
1154 plane_req->plane_id); in drm_mode_setplane()
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| /linux/include/uapi/drm/ |
| H A D | i915_drm.h | 1926 __u32 plane_id; member
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| /linux/tools/include/uapi/drm/ |
| H A D | i915_drm.h | |
| /linux/drivers/gpu/drm/amd/display/amdgpu_dm/ |
| H A D | amdgpu_dm.c | 5432 struct amdgpu_mode_info *mode_info, int plane_id, in initialize_plane() argument
5453 possible_crtcs = 1 << plane_id; in initialize_plane()
5454 if (plane_id >= dm->dc->caps.max_streams) in initialize_plane()
5466 mode_info->planes[plane_id] = plane; in initialize_plane()
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