| /linux/drivers/gpu/drm/i915/display/ |
| H A D | intel_sprite_regs.h | 230 #define _VLV_SPR(pipe, plane_id, reg_a, reg_b) \ argument
231 _PIPE((pipe) * 2 + (plane_id) - PLANE_SPRITE0, (reg_a), (reg_b))
232 #define _MMIO_VLV_SPR(pipe, plane_id, reg_a, reg_b) \ argument
233 _MMIO(_VLV_SPR((pipe), (plane_id), (reg_a), (reg_b)))
237 #define SPCNTR(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPACNTR, _SPBCNTR) argument
266 #define SPLINOFF(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPALINOFF, _SPBLINOFF) argument
270 #define SPSTRIDE(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPASTRIDE, _SPBSTRIDE) argument
274 #define SPPOS(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPAPOS, _SPBPOS) argument
282 #define SPSIZE(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPASIZE, _SPBSIZE) argument
290 #define SPKEYMINVAL(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPAKEYMINVAL, _SPBKEYMINVAL) argument
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| H A D | skl_universal_plane.c | 249 enum plane_id plane_id) in icl_is_nv12_y_plane() argument
252 icl_nv12_y_plane_mask(display) & BIT(plane_id); in icl_is_nv12_y_plane()
260 bool icl_is_hdr_plane(struct intel_display *display, enum plane_id plane_id) in icl_is_hdr_plane() argument
263 icl_hdr_plane_mask() & BIT(plane_id); in icl_is_hdr_plane()
449 enum intel_fbc_id fbc_id, enum plane_id plane_id) in skl_plane_has_fbc() argument
455 return icl_is_hdr_plane(display, plane_id); in skl_plane_has_fbc()
457 return plane_id == PLANE_1; in skl_plane_has_fbc()
682 enum plane_id plane_id = plane->id; in icl_program_input_csc() local
724 intel_de_write_dsb(display, dsb, PLANE_INPUT_CSC_COEFF(pipe, plane_id, 0), in icl_program_input_csc()
726 intel_de_write_dsb(display, dsb, PLANE_INPUT_CSC_COEFF(pipe, plane_id, 1), in icl_program_input_csc()
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| H A D | intel_cursor.c | 624 enum plane_id plane_id = plane->id; in skl_write_cursor_wm() local
628 &crtc_state->wm.skl.plane_ddb[plane_id]; in skl_write_cursor_wm()
633 skl_cursor_wm_reg_val(skl_plane_wm_level(pipe_wm, plane_id, level))); in skl_write_cursor_wm()
636 skl_cursor_wm_reg_val(skl_plane_trans_wm(pipe_wm, plane_id))); in skl_write_cursor_wm()
639 const struct skl_plane_wm *wm = &pipe_wm->planes[plane_id]; in skl_write_cursor_wm()
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| H A D | intel_display_types.h | 1600 enum plane_id id;
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| /linux/drivers/gpu/drm/sti/ |
| H A D | sti_mixer.c | 239 int plane_id, depth = plane->drm_plane.state->normalized_zpos; in sti_mixer_set_plane_depth() local
245 plane_id = GAM_DEPTH_GDP0_ID; in sti_mixer_set_plane_depth()
248 plane_id = GAM_DEPTH_GDP1_ID; in sti_mixer_set_plane_depth()
251 plane_id = GAM_DEPTH_GDP2_ID; in sti_mixer_set_plane_depth()
254 plane_id = GAM_DEPTH_GDP3_ID; in sti_mixer_set_plane_depth()
257 plane_id = GAM_DEPTH_VID0_ID; in sti_mixer_set_plane_depth()
271 if ((val & mask) == plane_id << (3 * i)) in sti_mixer_set_plane_depth()
276 plane_id = plane_id << (3 * depth); in sti_mixer_set_plane_depth()
281 plane_id, mask); in sti_mixer_set_plane_depth()
284 val |= plane_id; in sti_mixer_set_plane_depth()
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/ |
| H A D | dml2_dc_resource_mgmt.c | 59 unsigned int stream_id, unsigned int plane_index, unsigned int *plane_id) in get_plane_id() argument
64 if (!plane_id) in get_plane_id()
72 *plane_id = (i << 16) | j; in get_plane_id()
82 …t find_disp_cfg_idx_by_plane_id(struct dml2_dml_to_dc_pipe_mapping *mapping, unsigned int plane_id) in find_disp_cfg_idx_by_plane_id() argument
87 if (mapping->disp_cfg_to_plane_id_valid[i] && mapping->disp_cfg_to_plane_id[i] == plane_id) in find_disp_cfg_idx_by_plane_id()
124 struct dc_state *state, unsigned int plane_id) in find_master_pipe_of_plane() argument
133 if (plane_id_assigned_to_pipe == plane_id) in find_master_pipe_of_plane()
142 struct dc_state *state, unsigned int plane_id, unsigned int *pipes) in find_pipes_assigned_to_plane() argument
157 if (plane_id_assigned_to_pipe == plane_id && !pipe->prev_odm_pipe in find_pipes_assigned_to_plane()
661 unsigned int plane_id; in assign_pipes_to_plane() local
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| H A D | dml2_translation_helper.c | 1160 unsigned int stream_id, unsigned int plane_index, unsigned int *plane_id) in get_plane_id() argument
1165 if (!plane_id) in get_plane_id()
1173 *plane_id = (i << 16) | j; in get_plane_id()
1187 unsigned int plane_id; in map_plane_to_dml_display_cfg() local
1191 if (!get_plane_id(context->bw_ctx.dml2, context, plane, stream_id, plane_index, &plane_id)) { in map_plane_to_dml_display_cfg()
1197 …lane_id_valid[i] && dml2->v20.scratch.dml_to_dc_pipe_mapping.disp_cfg_to_plane_id[i] == plane_id) { in map_plane_to_dml_display_cfg()
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| /linux/drivers/gpu/drm/i915/gvt/ |
| H A D | dmabuf.c | 258 int plane_id) in vgpu_get_plane_info() argument
266 if (plane_id == DRM_PLANE_TYPE_PRIMARY) { in vgpu_get_plane_info()
296 } else if (plane_id == DRM_PLANE_TYPE_CURSOR) { in vgpu_get_plane_info()
318 gvt_vgpu_err("invalid plane id:%d\n", plane_id); in vgpu_get_plane_info()
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| /linux/drivers/gpu/drm/ |
| H A D | drm_plane.c | 863 plane = drm_plane_find(dev, file_priv, plane_resp->plane_id); in drm_mode_getplane()
883 plane_resp->plane_id = plane->base.id; in drm_mode_getplane()
1151 plane = drm_plane_find(dev, file_priv, plane_req->plane_id); in drm_mode_setplane()
1154 plane_req->plane_id); in drm_mode_setplane()
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| /linux/include/uapi/drm/ |
| H A D | i915_drm.h | 1926 __u32 plane_id; member
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| /linux/tools/include/uapi/drm/ |
| H A D | i915_drm.h | |
| /linux/drivers/gpu/drm/amd/display/amdgpu_dm/ |
| H A D | amdgpu_dm.c | 2285 struct amdgpu_mode_info *mode_info, int plane_id, in initialize_plane()
2306 possible_crtcs = 1 << plane_id; in initialize_plane()
2307 if (plane_id >= dm->dc->caps.max_streams) in initialize_plane()
2319 mode_info->planes[plane_id] = plane;
2278 initialize_plane(struct amdgpu_display_manager * dm,struct amdgpu_mode_info * mode_info,int plane_id,enum drm_plane_type plane_type,const struct dc_plane_cap * plane_cap) initialize_plane() argument
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