Home
last modified time | relevance | path

Searched refs:plane1_base_address (Results 1 – 25 of 25) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/hubp/dcn21/
H A Ddcn21_hubp.c146 DET_BUF_PLANE1_BASE_ADDRESS, rq_regs->plane1_base_address); in hubp21_program_requestor()
268 DET_BUF_PLANE1_BASE_ADDRESS, &rq_regs.plane1_base_address); in hubp21_validate_dml_output()
292 if (rq_regs.plane1_base_address != dml_rq_regs->plane1_base_address) in hubp21_validate_dml_output()
294 dml_rq_regs->plane1_base_address, rq_regs.plane1_base_address); in hubp21_validate_dml_output()
/linux/drivers/gpu/drm/amd/display/dc/hubp/dcn20/
H A Ddcn20_hubp.c203 DET_BUF_PLANE1_BASE_ADDRESS, rq_regs->plane1_base_address); in hubp2_program_requestor()
1125 DET_BUF_PLANE1_BASE_ADDRESS, &rq_regs->plane1_base_address); in hubp2_read_state_common()
1358 DET_BUF_PLANE1_BASE_ADDRESS, &rq_regs.plane1_base_address); in hubp2_validate_dml_output()
1383 if (rq_regs.plane1_base_address != dml_rq_regs->plane1_base_address) in hubp2_validate_dml_output()
1385 dml_rq_regs->plane1_base_address, rq_regs.plane1_base_address); in hubp2_validate_dml_output()
/linux/drivers/gpu/drm/amd/display/dc/hubp/dcn201/
H A Ddcn201_hubp.c72 DET_BUF_PLANE1_BASE_ADDRESS, rq_regs->plane1_base_address); in hubp201_program_requestor()
/linux/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/
H A Ddml_top_dchub_registers.h121 uint32_t plane1_base_address;
122 uint32_t plane1_base_address; global() member
/linux/drivers/gpu/drm/amd/display/dc/dml/
H A Ddisplay_rq_dlg_helpers.c187 dml_print("DML_RQ_DLG_CALC: plane1_base_address = 0x%0x\n", rq_regs->plane1_base_address); in print__rq_regs_st()
H A Ddisplay_mode_structs.h716 unsigned int plane1_base_address;
715 unsigned int plane1_base_address; global() member
H A Ddml1_display_rq_dlg_calc.c269 rq_regs->plane1_base_address = detile_buf_plane1_addr; in dml1_extract_rq_regs()
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/
H A Ddisplay_rq_dlg_calc_32.c192 rq_regs->plane1_base_address = detile_buf_plane1_addr; in dml32_rq_dlg_get_rq_reg()
200 dml_print("DML_DLG: %s: plane1_base_address = %d\n", __func__, rq_regs->plane1_base_address); in dml32_rq_dlg_get_rq_reg()
/linux/drivers/gpu/drm/amd/display/dc/dml2/
H A Ddml_display_rq_dlg_calc.c179 rq_regs->plane1_base_address = detile_buf_plane1_addr; in dml_rq_dlg_get_rq_reg()
187 dml_print("DML_DLG: %s: plane1_base_address = %d\n", __func__, rq_regs->plane1_base_address); in dml_rq_dlg_get_rq_reg()
H A Ddml2_translation_helper.c1432 out->rq_regs.plane1_base_address = rq_regs->plane1_base_address; in dml2_update_pipe_ctx_dchub_regs()
H A Ddisplay_mode_util.c245 dml_print("DML: plane1_base_address = 0x%x\n", rq_regs->plane1_base_address); in dml_print_rq_regs_st()
H A Ddisplay_mode_core_structs.h1971 dml_uint_t plane1_base_address; member
/linux/drivers/gpu/drm/amd/display/dc/dml2/dml21/
H A Ddml21_utils.c174 out->rq_regs.plane1_base_address = rq_regs->plane1_base_address; in dml21_update_pipe_ctx_dchub_regs()
/linux/drivers/gpu/drm/amd/display/dc/hubp/dcn401/
H A Ddcn401_hubp.c176 DET_BUF_PLANE1_BASE_ADDRESS, rq_regs->plane1_base_address); in hubp401_program_requestor()
769 DET_BUF_PLANE1_BASE_ADDRESS, &rq_regs->plane1_base_address); in hubp401_read_state()
/linux/drivers/gpu/drm/amd/display/dc/hubp/dcn10/
H A Ddcn10_hubp.c559 DET_BUF_PLANE1_BASE_ADDRESS, rq_regs->plane1_base_address); in hubp1_program_requestor()
880 DET_BUF_PLANE1_BASE_ADDRESS, &rq_regs->plane1_base_address); in hubp1_read_state_common()
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/
H A Ddisplay_rq_dlg_calc_31.c154 rq_regs->plane1_base_address = detile_buf_plane1_addr; in extract_rq_regs()
159 dml_print("DML_DLG: %s: plane1_base_address = %0d\n", __func__, rq_regs->plane1_base_address); in extract_rq_regs()
/linux/drivers/gpu/drm/amd/display/dc/dcn10/
H A Ddcn10_hw_sequencer_debug.c214 rq_regs->crq_expansion_mode, rq_regs->plane1_base_address, rq_regs->rq_regs_l.chunk_size, in dcn10_get_rq_states()
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn314/
H A Ddisplay_rq_dlg_calc_314.c242 rq_regs->plane1_base_address = detile_buf_plane1_addr; in extract_rq_regs()
247 dml_print("DML_DLG: %s: plane1_base_address = %0d\n", __func__, rq_regs->plane1_base_address); in extract_rq_regs()
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/
H A Ddisplay_rq_dlg_calc_20.c231 rq_regs->plane1_base_address = detile_buf_plane1_addr; in extract_rq_regs()
H A Ddisplay_rq_dlg_calc_20v2.c231 rq_regs->plane1_base_address = detile_buf_plane1_addr; in extract_rq_regs()
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn21/
H A Ddisplay_rq_dlg_calc_21.c212 rq_regs->plane1_base_address = detile_buf_plane1_addr; in extract_rq_regs()
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn30/
H A Ddisplay_rq_dlg_calc_30.c155 rq_regs->plane1_base_address = detile_buf_plane1_addr; in extract_rq_regs()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn10/
H A Ddcn10_hwseq.c219 rq_regs->crq_expansion_mode, rq_regs->plane1_base_address, rq_regs->rq_regs_l.chunk_size, in dcn10_log_hubp_states()
/linux/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/
H A Ddml2_core_shared.c11587 rq_regs->plane1_base_address = detile_buf_plane1_addr; in rq_dlg_get_dlg_reg()
11595 dml2_printf("DML_DLG: %s: plane1_base_address = %d\n", __func__, rq_regs->plane1_base_address); in rq_dlg_get_dlg_reg()
H A Ddml2_core_dcn4_calcs.c11904 rq_regs->plane1_base_address = detile_buf_plane1_addr; in rq_dlg_get_dlg_reg()
11912 dml2_printf("DML_DLG: %s: plane1_base_address = %d\n", __func__, rq_regs->plane1_base_address); in rq_dlg_get_dlg_reg()