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Searched refs:pl2 (Results 1 – 5 of 5) sorted by relevance

/linux/arch/x86/kernel/
H A Dhead32.c109 pl2_t pl2 = SET_PL2((unsigned long)*ptep | PDE_IDENT_ATTR); in init_map() local
112 **pl2p = pl2; in init_map()
115 *(*pl2p + ((PAGE_OFFSET >> PGDIR_SHIFT))) = pl2; in init_map()
/linux/drivers/platform/x86/hp/
H A Dhp-wmi.c339 u8 pl2;
1846 static int victus_s_set_cpu_pl1_pl2(u8 pl1, u8 pl2) in victus_s_set_cpu_pl1_pl2()
1852 if (pl1 == HP_POWER_LIMIT_NO_CHANGE || pl2 == HP_POWER_LIMIT_NO_CHANGE) in victus_s_set_cpu_pl1_pl2()
1856 if (pl2 < pl1) in victus_s_set_cpu_pl1_pl2()
1860 power_limits.pl2 = pl2; in platform_profile_victus_s_get_ec()
327 u8 pl2; global() member
1834 victus_s_set_cpu_pl1_pl2(u8 pl1,u8 pl2) victus_s_set_cpu_pl1_pl2() argument
/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dsmu7_hwmgr.c4799 const struct smu7_performance_level *pl2) in smu7_are_power_levels_equal() argument
4801 return ((pl1->memory_clock == pl2->memory_clock) && in smu7_are_power_levels_equal()
4802 (pl1->engine_clock == pl2->engine_clock) && in smu7_are_power_levels_equal()
4803 (pl1->pcie_gen == pl2->pcie_gen) && in smu7_are_power_levels_equal()
4804 (pl1->pcie_lane == pl2->pcie_lane)); in smu7_are_power_levels_equal()
H A Dvega10_hwmgr.c4865 const struct vega10_performance_level *pl2) in vega10_power_gate_vce()
4867 return ((pl1->soc_clock == pl2->soc_clock) && in vega10_power_gate_vce()
4868 (pl1->gfx_clock == pl2->gfx_clock) && in vega10_power_gate_vce()
4869 (pl1->mem_clock == pl2->mem_clock)); in vega10_power_gate_vce()
4882 vega10_are_power_levels_equal(const struct vega10_performance_level * pl1,const struct vega10_performance_level * pl2) vega10_are_power_levels_equal() argument
/linux/arch/arm/boot/dts/nvidia/
H A Dtegra30-asus-p1801-t.dts879 vi-d4-pl2 {