Home
last modified time | relevance | path

Searched refs:pipe_src (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dml/
H A Ddisplay_mode_lib.c165 display_pipe_source_params_st *pipe_src; in dml_log_pipe_params() local
174 pipe_src = &(pipes[i].pipe.src); in dml_log_pipe_params()
183 dml_print("DML PARAMS: source_format = %d\n", pipe_src->source_format); in dml_log_pipe_params()
184 dml_print("DML PARAMS: dcc = %d\n", pipe_src->dcc); in dml_log_pipe_params()
185 dml_print("DML PARAMS: dcc_rate = %d\n", pipe_src->dcc_rate); in dml_log_pipe_params()
186 dml_print("DML PARAMS: dcc_use_global = %d\n", pipe_src->dcc_use_global); in dml_log_pipe_params()
187 dml_print("DML PARAMS: vm = %d\n", pipe_src->vm); in dml_log_pipe_params()
188 dml_print("DML PARAMS: gpuvm = %d\n", pipe_src->gpuvm); in dml_log_pipe_params()
189 dml_print("DML PARAMS: hostvm = %d\n", pipe_src->hostvm); in dml_log_pipe_params()
190 dml_print("DML PARAMS: gpuvm_levels_force_en = %d\n", pipe_src->gpuvm_levels_force_en); in dml_log_pipe_params()
[all …]
/linux/drivers/gpu/drm/i915/display/
H A Dintel_psr.c2680 struct drm_rect *pipe_src) in clip_area_update() argument
2682 if (!drm_rect_intersect(damage_area, pipe_src)) in clip_area_update()
2760 &crtc_state->pipe_src); in intel_psr2_sel_fetch_et_alignment()
2870 crtc_state->psr2_su_area.x2 = drm_rect_width(&crtc_state->pipe_src); in intel_psr2_sel_fetch_update()
2908 &crtc_state->pipe_src); in intel_psr2_sel_fetch_update()
2915 &crtc_state->pipe_src); in intel_psr2_sel_fetch_update()
2923 &crtc_state->pipe_src); in intel_psr2_sel_fetch_update()
2939 clip_area_update(&crtc_state->psr2_su_area, &damaged_area, &crtc_state->pipe_src); in intel_psr2_sel_fetch_update()
3050 clip_area_update(&crtc_state->psr2_su_area, &crtc_state->pipe_src, in intel_psr2_sel_fetch_update()
3051 &crtc_state->pipe_src); in intel_psr2_sel_fetch_update()
H A Dintel_display.c2203 drm_rect_width(&crtc_state->pipe_src) << 16, in ilk_pipe_pixel_rate()
2204 drm_rect_height(&crtc_state->pipe_src) << 16); in ilk_pipe_pixel_rate()
2310 mode->hdisplay = drm_rect_width(&crtc_state->pipe_src) * in intel_crtc_readout_derived_state()
2312 mode->vdisplay = drm_rect_height(&crtc_state->pipe_src); in intel_crtc_readout_derived_state()
2337 width = drm_rect_width(&crtc_state->pipe_src); in intel_joiner_compute_pipe_src()
2338 height = drm_rect_height(&crtc_state->pipe_src); in intel_joiner_compute_pipe_src()
2340 drm_rect_init(&crtc_state->pipe_src, 0, 0, in intel_joiner_compute_pipe_src()
2357 if (drm_rect_width(&crtc_state->pipe_src) & 1) { in intel_crtc_compute_pipe_src()
2824 int width = drm_rect_width(&crtc_state->pipe_src); in intel_set_pipe_src_size()
2825 int height = drm_rect_height(&crtc_state->pipe_src); in intel_set_pipe_src_size()
[all …]
H A Dintel_overlay.c982 if (!drm_rect_intersect(&clipped, &crtc_state->pipe_src)) in check_overlay_dst()
1178 if (drm_rect_width(&crtc->config->pipe_src) > 1024 && in intel_overlay_put_image_ioctl()
H A Dintel_plane.c1018 const struct drm_rect *clip = &crtc_state->pipe_src; in intel_plane_check_clipping()