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Searched refs:pipe_index (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_top/
H A Ddml2_top_soc15.c400 unsigned int pipe_index; in find_shift_for_valid_cache_id_assignment() local
417 for (pipe_index = 0; pipe_index < pipe_count; pipe_index++) { in find_shift_for_valid_cache_id_assignment()
419 pipe_vp_startx[pipe_index], pipe_vp_endx[pipe_index], 0, 0)) { in find_shift_for_valid_cache_id_assignment()
1023 int config_index, pipe_index; in dml2_top_soc15_build_mcache_programming() local
1030 …for (pipe_index = 0; pipe_index < params->mcache_configurations[config_index].num_pipes; pipe_inde… in dml2_top_soc15_build_mcache_programming()
1032 …params->per_plane_pipe_mcache_regs[config_index][pipe_index] = &params->mcache_regs_set[free_per_p… in dml2_top_soc15_build_mcache_programming()
1034 reset_mcache_allocations(params->per_plane_pipe_mcache_regs[config_index][pipe_index]); in dml2_top_soc15_build_mcache_programming()
1041 …params->mcache_configurations[config_index].pipe_configurations[pipe_index].plane0.viewport_x_star… in dml2_top_soc15_build_mcache_programming()
1042 …params->mcache_configurations[config_index].pipe_configurations[pipe_index].plane0.viewport_x_star… in dml2_top_soc15_build_mcache_programming()
1043 …params->mcache_configurations[config_index].pipe_configurations[pipe_index].plane0.viewport_width … in dml2_top_soc15_build_mcache_programming()
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/linux/sound/pci/echoaudio/
H A Dechoaudio_dsp.c766 static void set_audio_format(struct echoaudio *chip, u16 pipe_index, in set_audio_format() argument
834 "set_audio_format[%d] = %x\n", pipe_index, dsp_format); in set_audio_format()
835 chip->comm_page->audio_format[pipe_index] = cpu_to_le16(dsp_format); in set_audio_format()
922 static inline int is_pipe_allocated(struct echoaudio *chip, u16 pipe_index) in is_pipe_allocated() argument
924 return (chip->pipe_alloc_mask & (1 << pipe_index)); in is_pipe_allocated()
1040 int pipe_index, int interleave) in allocate_pipes() argument
1046 "allocate_pipes: ch=%d int=%d\n", pipe_index, interleave); in allocate_pipes()
1052 channel_mask |= 1 << (pipe_index + i); in allocate_pipes()
1059 chip->comm_page->position[pipe_index] = 0; in allocate_pipes()
1063 pipe->index = pipe_index; in allocate_pipes()
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H A Dechoaudio.c522 int pipe_index, int interleave) in init_engine() argument
542 err = allocate_pipes(chip, pipe, pipe_index, interleave); in init_engine()
545 pipe_index, err); in init_engine()
549 dev_dbg(chip->card->dev, "allocate_pipes()=%d\n", pipe_index); in init_engine()
594 chip->substream[pipe_index] = substream; in init_engine()
677 int pipe_index = ((struct audiopipe *)runtime->private_data)->index; in pcm_prepare() local
707 if (snd_BUG_ON(pipe_index >= px_num(chip))) in pcm_prepare()
717 if (snd_BUG_ON(!is_pipe_allocated(chip, pipe_index))) in pcm_prepare()
720 set_audio_format(chip, pipe_index, &format); in pcm_prepare()
/linux/drivers/gpu/drm/renesas/rz-du/
H A Drzg2l_du_vsp.h64 unsigned int pipe_index);
76 unsigned int pipe_index) in rzg2l_du_vsp_get_drm_plane() argument
H A Drzg2l_du_vsp.c74 unsigned int pipe_index) in rzg2l_du_vsp_get_drm_plane() argument
82 if (vsp_plane->index == pipe_index) in rzg2l_du_vsp_get_drm_plane()
/linux/include/linux/
H A Dpipe_fs_i.h53 union pipe_index { union
88 union pipe_index;
/linux/drivers/media/platform/renesas/vsp1/
H A Dvsp1_video.h42 unsigned int pipe_index; member
H A Dvsp1_video.c254 pipe->buffers_ready |= 1 << video->pipe_index; in vsp1_video_frame_end()
484 rwpf->video->pipe_index = ++pipe->num_inputs; in vsp1_video_pipeline_build()
490 rwpf->video->pipe_index = 0; in vsp1_video_pipeline_build()
678 pipe->buffers_ready |= 1 << video->pipe_index; in vsp1_video_buffer_queue()
864 pipe->buffers_ready &= ~(1 << video->pipe_index); in vsp1_video_stop_streaming()
/linux/drivers/gpu/drm/
H A Ddrm_vblank.c1742 unsigned int pipe_index; in drm_wait_vblank_ioctl() local
1765 pipe_index = high_pipe >> _DRM_VBLANK_HIGH_CRTC_SHIFT; in drm_wait_vblank_ioctl()
1767 pipe_index = flags & _DRM_VBLANK_SECONDARY ? 1 : 0; in drm_wait_vblank_ioctl()
1774 if (pipe_index == 0) in drm_wait_vblank_ioctl()
1776 pipe_index--; in drm_wait_vblank_ioctl()
1781 pipe = pipe_index; in drm_wait_vblank_ioctl()
/linux/drivers/gpu/drm/amd/display/dc/dml2_0/
H A Ddml2_translation_helper.c1204 unsigned int pipe_index = 0; in dml2_populate_pipe_to_plane_index_mapping() local
1220 pipe_index = pipe->pipe_idx; in dml2_populate_pipe_to_plane_index_mapping()
1222 …if (pipe->stream && dml_to_dc_pipe_mapping->dml_pipe_idx_to_plane_index_valid[pipe_index] == false… in dml2_populate_pipe_to_plane_index_mapping()
1223 dml_to_dc_pipe_mapping->dml_pipe_idx_to_plane_index[pipe_index] = plane_index; in dml2_populate_pipe_to_plane_index_mapping()
1225 dml_to_dc_pipe_mapping->dml_pipe_idx_to_plane_index_valid[pipe_index] = true; in dml2_populate_pipe_to_plane_index_mapping()
/linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/
H A Ddml2_core_dcn4_calcs.c12793 struct dml2_dchub_per_pipe_register_set *out, int pipe_index) in dml2_core_calcs_get_pipe_regs() argument
12795 rq_dlg_get_rq_reg(&out->rq_regs, display_cfg, mode_lib, pipe_index); in dml2_core_calcs_get_pipe_regs()
12796 …get_dlg_reg(&mode_lib->scratch, &out->dlg_regs, &out->ttu_regs, display_cfg, mode_lib, pipe_index); in dml2_core_calcs_get_pipe_regs()
12797 …out->det_size = dml_get_det_buffer_size_kbytes(mode_lib, pipe_index) / mode_lib->ip.config_return_… in dml2_core_calcs_get_pipe_regs()
12800 …_core_internal_display_mode_lib *mode_lib, union dml2_global_sync_programming *out, int pipe_index) in dml2_core_calcs_get_global_sync_programming() argument
12802 out->dcn4x.vready_offset_pixels = dml_get_vready_offset(mode_lib, pipe_index); in dml2_core_calcs_get_global_sync_programming()
12803 out->dcn4x.vstartup_lines = dml_get_vstartup_calculated(mode_lib, pipe_index); in dml2_core_calcs_get_global_sync_programming()
12804 out->dcn4x.vupdate_offset_pixels = dml_get_vupdate_offset(mode_lib, pipe_index); in dml2_core_calcs_get_global_sync_programming()
12805 out->dcn4x.vupdate_vupdate_width_pixels = dml_get_vupdate_width(mode_lib, pipe_index); in dml2_core_calcs_get_global_sync_programming()
12806 out->dcn4x.pstate_keepout_start_lines = dml_get_pstate_keepout_dst_lines(mode_lib, pipe_index); in dml2_core_calcs_get_global_sync_programming()
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