Home
last modified time | relevance | path

Searched refs:pipe_ctx (Results 1 – 25 of 44) sorted by relevance

12

/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn20/
H A Ddcn20_hwseq.h34 struct pipe_ctx *pipe_ctx, const struct dc_plane_state *plane_state);
36 struct pipe_ctx *pipe_ctx, const struct dc_plane_state *plane_state);
43 void dcn20_update_plane_addr(const struct dc *dc, struct pipe_ctx *pipe_ctx);
44 void dcn20_update_mpcc(struct dc *dc, struct pipe_ctx *pipe_ctx);
45 bool dcn20_set_input_transfer_func(struct dc *dc, struct pipe_ctx *pipe_ctx,
47 bool dcn20_set_output_transfer_func(struct dc *dc, struct pipe_ctx *pipe_ctx,
50 struct pipe_ctx *pipe_ctx,
54 void dcn20_enable_stream(struct pipe_ctx *pipe_ctx);
55 void dcn20_unblank_stream(struct pipe_ctx *pipe_ctx,
57 void dcn20_disable_plane(struct dc *dc, struct dc_state *state, struct pipe_ctx *pipe_ctx);
[all …]
H A Ddcn20_hwseq.c219 struct pipe_ctx *pipe_ctx, in dcn20_setup_gsl_group_as_lock() argument
231 if (pipe_ctx->stream_res.gsl_group > 0) in dcn20_setup_gsl_group_as_lock()
236 pipe_ctx->stream_res.gsl_group = group_idx; in dcn20_setup_gsl_group_as_lock()
258 group_idx = pipe_ctx->stream_res.gsl_group; in dcn20_setup_gsl_group_as_lock()
262 pipe_ctx->stream_res.gsl_group = 0; in dcn20_setup_gsl_group_as_lock()
286 if (pipe_ctx->stream_res.tg->funcs->set_gsl != NULL) { in dcn20_setup_gsl_group_as_lock()
287 pipe_ctx->stream_res.tg->funcs->set_gsl( in dcn20_setup_gsl_group_as_lock()
288 pipe_ctx->stream_res.tg, in dcn20_setup_gsl_group_as_lock()
290 if (pipe_ctx->stream_res.tg->funcs->set_gsl_source_select != NULL) in dcn20_setup_gsl_group_as_lock()
291 pipe_ctx->stream_res.tg->funcs->set_gsl_source_select( in dcn20_setup_gsl_group_as_lock()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/link/
H A Dlink_dpms.c151 struct pipe_ctx *pipes[MAX_PIPES]; in link_set_all_streams_dpms_off_for_link()
196 const struct pipe_ctx *pipe) in is_master_pipe_for_link()
209 struct pipe_ctx *pipes[MAX_PIPES]) in link_get_master_pipes_with_dpms_on()
212 struct pipe_ctx *pipe = NULL; in link_get_master_pipes_with_dpms_on()
216 pipe = &state->res_ctx.pipe_ctx[i]; in link_get_master_pipes_with_dpms_on()
225 static bool get_ext_hdmi_settings(struct pipe_ctx *pipe_ctx, in get_ext_hdmi_settings() argument
232 pipe_ctx->stream->ctx->dc_bios->integrated_info; in get_ext_hdmi_settings()
322 static bool write_i2c(struct pipe_ctx *pipe_ctx, in write_i2c() argument
333 cmd.speed = pipe_ctx->stream->ctx->dc->caps.i2c_speed_in_khz; in write_i2c()
341 if (dm_helpers_submit_i2c(pipe_ctx->stream->ctx, in write_i2c()
[all …]
H A Dlink_hwss_hpo_frl.c29 static void setup_hpo_frl_stream_attribute(struct pipe_ctx *pipe_ctx) in setup_hpo_frl_stream_attribute() argument
31 struct hpo_frl_stream_encoder *stream_enc = pipe_ctx->stream_res.hpo_frl_stream_enc; in setup_hpo_frl_stream_attribute()
32 struct dc_stream_state *stream = pipe_ctx->stream; in setup_hpo_frl_stream_attribute()
33 struct pipe_ctx *odm_pipe; in setup_hpo_frl_stream_attribute()
37 for (odm_pipe = pipe_ctx->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) in setup_hpo_frl_stream_attribute()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn401/
H A Ddcn401_hwseq.c86 void dcn401_program_gamut_remap(struct pipe_ctx *pipe_ctx) in dcn401_program_gamut_remap() argument
90 unsigned int mpcc_id = pipe_ctx->plane_res.mpcc_inst; in dcn401_program_gamut_remap()
91 struct mpc *mpc = pipe_ctx->stream_res.opp->ctx->dc->res_pool->mpc; in dcn401_program_gamut_remap()
94 if (pipe_ctx->plane_state) in dcn401_program_gamut_remap()
95 ASSERT(pipe_ctx->plane_state->mcm_location == MPCC_MOVABLE_CM_LOCATION_BEFORE); in dcn401_program_gamut_remap()
102 if (pipe_ctx->plane_state && in dcn401_program_gamut_remap()
103 pipe_ctx->plane_state->gamut_remap_matrix.enable_remap == true) { in dcn401_program_gamut_remap()
107 pipe_ctx->plane_state->gamut_remap_matrix.matrix[i]; in dcn401_program_gamut_remap()
123 if (pipe_ctx->top_pipe == NULL) { in dcn401_program_gamut_remap()
124 if (pipe_ctx->stream->gamut_remap_matrix.enable_remap == true) { in dcn401_program_gamut_remap()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/hwss/
H A Dhw_sequencer.h37 struct pipe_ctx;
64 struct pipe_ctx *pipe_ctx; member
75 struct pipe_ctx *pipe_ctx; member
81 struct pipe_ctx *pipe_ctx; member
86 struct pipe_ctx *pipe_ctx; member
91 struct pipe_ctx *pipe_ctx; member
95 struct pipe_ctx *pipe_ctx; member
105 struct pipe_ctx *pipe_ctx; member
109 struct pipe_ctx *pipe_ctx; member
114 struct pipe_ctx *pipe_ctx; member
[all …]
/linux/drivers/gpu/drm/amd/display/dc/core/
H A Ddc_resource.c701 const struct pipe_ctx *pipe_with_clk_src, in is_sharable_clk_src()
702 const struct pipe_ctx *pipe) in is_sharable_clk_src()
733 struct pipe_ctx *pipe_ctx) in resource_find_used_clk_src_for_sharing() argument
738 if (is_sharable_clk_src(&res_ctx->pipe_ctx[i], pipe_ctx)) in resource_find_used_clk_src_for_sharing()
739 return res_ctx->pipe_ctx[i].clock_source; in resource_find_used_clk_src_for_sharing()
852 struct pipe_ctx *pipe_ctx, in calculate_plane_rec_in_timing_active() argument
916 const struct dc_stream_state *stream = pipe_ctx->stream; in calculate_plane_rec_in_timing_active()
942 struct pipe_ctx *pipe_ctx, in calculate_mpc_slice_in_timing_active() argument
945 const struct dc_stream_state *stream = pipe_ctx->stream; in calculate_mpc_slice_in_timing_active()
946 int mpc_slice_count = resource_get_mpc_slice_count(pipe_ctx); in calculate_mpc_slice_in_timing_active()
[all …]
H A Ddc.c432 struct pipe_ctx *pipe = &dc->current_state->res_ctx.pipe_ctx[i]; in set_long_vtotal()
496 struct pipe_ctx *pipe = &dc->current_state->res_ctx.pipe_ctx[i]; in dc_stream_adjust_vmin_vmax()
538 struct pipe_ctx *pipe = &dc->current_state->res_ctx.pipe_ctx[i]; in dc_stream_get_last_used_drr_vtotal()
599 struct pipe_ctx *pipe; in dc_stream_forward_crc_window()
604 pipe = &dc->current_state->res_ctx.pipe_ctx[i]; in dc_stream_forward_crc_window()
665 struct pipe_ctx *pipe; in dc_stream_forward_multiple_crc_window()
670 pipe = &dc->current_state->res_ctx.pipe_ctx[i]; in dc_stream_forward_multiple_crc_window()
714 struct pipe_ctx *pipe; in dc_stream_configure_crc()
787 struct pipe_ctx *pipe; in dc_stream_get_crc()
793 pipe = &dc->current_state->res_ctx.pipe_ctx[i]; in dc_stream_get_crc()
[all …]
H A Ddc_surface.c74 struct pipe_ctx *pipe_ctx = &dc_state->res_ctx.pipe_ctx[i]; in dc_plane_get_pipe_mask() local
76 if (pipe_ctx->plane_state == plane_state && pipe_ctx->plane_res.hubp) in dc_plane_get_pipe_mask()
77 pipe_mask |= 1 << pipe_ctx->plane_res.hubp->inst; in dc_plane_get_pipe_mask()
134 struct pipe_ctx *pipe_ctx = in dc_plane_get_status() local
135 &dc->current_state->res_ctx.pipe_ctx[i]; in dc_plane_get_status()
137 if (pipe_ctx->plane_state != plane_state) in dc_plane_get_status()
140 if (pipe_ctx->plane_state && flags.bits.address) in dc_plane_get_status()
141 pipe_ctx->plane_state->status.is_flip_pending = false; in dc_plane_get_status()
149 struct pipe_ctx *pipe_ctx = in dc_plane_get_status() local
150 &dc->current_state->res_ctx.pipe_ctx[i]; in dc_plane_get_status()
[all …]
H A Ddc_hw_sequencer.c319 struct pipe_ctx *pipe_ctx, in get_mpctree_visual_confirm_color() argument
331 struct pipe_ctx *top_pipe = pipe_ctx; in get_mpctree_visual_confirm_color()
340 const struct pipe_ctx *pipe_ctx, in get_surface_visual_confirm_color() argument
345 switch (pipe_ctx->plane_res.scl_data.format) { in get_surface_visual_confirm_color()
349 if (pipe_ctx->plane_state->layer_index > 0) { in get_surface_visual_confirm_color()
359 if (pipe_ctx->plane_state->layer_index > 0) { in get_surface_visual_confirm_color()
378 if (pipe_ctx->plane_state->layer_index > 0) { in get_surface_visual_confirm_color()
390 struct pipe_ctx *pipe_ctx, in get_hdr_visual_confirm_color() argument
397 struct pipe_ctx *top_pipe_ctx = pipe_ctx; in get_hdr_visual_confirm_color()
465 struct pipe_ctx *pipe_ctx, in get_vabc_visual_confirm_color() argument
[all …]
H A Ddc_stream.c241 struct pipe_ctx *pipe_to_program = NULL; in program_cursor_attributes()
250 struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i]; in program_cursor_attributes() local
252 if (pipe_ctx->stream != stream) in program_cursor_attributes()
256 pipe_to_program = pipe_ctx; in program_cursor_attributes()
259 dc->hwss.begin_cursor_offload_update(dc, pipe_ctx); in program_cursor_attributes()
267 dc->hwss.set_cursor_attribute(pipe_ctx); in program_cursor_attributes()
269 dc_send_update_cursor_info_to_dmu(pipe_ctx, i); in program_cursor_attributes()
271 dc->hwss.set_cursor_sdr_white_level(pipe_ctx); in program_cursor_attributes()
273 dc->hwss.update_cursor_offload_pipe(dc, pipe_ctx); in program_cursor_attributes()
388 struct pipe_ctx *pipe_to_program = NULL; in program_cursor_position()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn201/
H A Ddcn201_hwseq.c57 struct pipe_ctx *pipe_ctx, PHYSICAL_ADDRESS_LOC *addr) in patch_address_for_sbs_tb_stereo() argument
59 struct dc_plane_state *plane_state = pipe_ctx->plane_state; in patch_address_for_sbs_tb_stereo()
60 bool sec_split = pipe_ctx->top_pipe && in patch_address_for_sbs_tb_stereo()
61 pipe_ctx->top_pipe->plane_state == pipe_ctx->plane_state; in patch_address_for_sbs_tb_stereo()
64 (pipe_ctx->stream->timing.timing_3d_format == in patch_address_for_sbs_tb_stereo()
66 pipe_ctx->stream->timing.timing_3d_format == in patch_address_for_sbs_tb_stereo()
73 if (pipe_ctx->stream->view_format != VIEW_3D_FORMAT_NONE && in patch_address_for_sbs_tb_stereo()
133 void dcn201_update_plane_addr(const struct dc *dc, struct pipe_ctx *pipe_ctx) in dcn201_update_plane_addr() argument
137 struct dc_plane_state *plane_state = pipe_ctx->plane_state; in dcn201_update_plane_addr()
145 addr_patched = patch_address_for_sbs_tb_stereo(pipe_ctx, &addr); in dcn201_update_plane_addr()
[all …]
H A Ddcn201_hwseq.h31 void dcn201_set_dmdata_attributes(struct pipe_ctx *pipe_ctx);
33 void dcn201_unblank_stream(struct pipe_ctx *pipe_ctx,
35 void dcn201_update_plane_addr(const struct dc *dc, struct pipe_ctx *pipe_ctx);
36 …d dcn201_plane_atomic_disconnect(struct dc *dc, struct dc_state *state, struct pipe_ctx *pipe_ctx);
37 void dcn201_update_mpcc(struct dc *dc, struct pipe_ctx *pipe_ctx);
38 void dcn201_set_cursor_attribute(struct pipe_ctx *pipe_ctx);
41 struct pipe_ctx *pipe,
/linux/drivers/gpu/drm/amd/display/dc/link/hwss/
H A Dlink_hwss_hpo_dp.c33 void set_hpo_dp_throttled_vcp_size(struct pipe_ctx *pipe_ctx, in set_hpo_dp_throttled_vcp_size() argument
37 pipe_ctx->stream_res.hpo_dp_stream_enc; in set_hpo_dp_throttled_vcp_size()
39 pipe_ctx->link_res.hpo_dp_link_enc; in set_hpo_dp_throttled_vcp_size()
46 void set_hpo_dp_hblank_min_symbol_width(struct pipe_ctx *pipe_ctx, in set_hpo_dp_hblank_min_symbol_width() argument
51 pipe_ctx->stream_res.hpo_dp_stream_enc; in set_hpo_dp_hblank_min_symbol_width()
52 struct dc_crtc_timing *timing = &pipe_ctx->stream->timing; in set_hpo_dp_hblank_min_symbol_width()
56 pipe_ctx->stream->link, link_settings); in set_hpo_dp_hblank_min_symbol_width()
74 void setup_hpo_dp_stream_encoder(struct pipe_ctx *pipe_ctx) in setup_hpo_dp_stream_encoder() argument
76 struct hpo_dp_stream_encoder *stream_enc = pipe_ctx->stream_res.hpo_dp_stream_enc; in setup_hpo_dp_stream_encoder()
77 struct hpo_dp_link_encoder *link_enc = pipe_ctx->link_res.hpo_dp_link_enc; in setup_hpo_dp_stream_encoder()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/inc/
H A Dlink_hwss.h38 struct pipe_ctx;
49 void (*set_hblank_min_symbol_width)(struct pipe_ctx *pipe_ctx,
52 void (*set_throttled_vcp_size)(struct pipe_ctx *pipe_ctx,
77 void (*setup_stream_encoder)(struct pipe_ctx *pipe_ctx);
78 void (*reset_stream_encoder)(struct pipe_ctx *pipe_ctx);
79 void (*setup_stream_attribute)(struct pipe_ctx *pipe_ctx);
83 void (*setup_audio_output)(struct pipe_ctx *pipe_ctx,
85 void (*enable_audio_packet)(struct pipe_ctx *pipe_ctx);
86 void (*disable_audio_packet)(struct pipe_ctx *pipe_ctx);
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn32/
H A Ddcn32_hwseq.h50 bool dcn32_set_mcm_luts(struct pipe_ctx *pipe_ctx,
54 struct pipe_ctx *pipe_ctx,
58 struct pipe_ctx *pipe_ctx, const struct dc_stream_state *stream);
61 struct pipe_ctx *pipe_ctx,
72 void dcn32_update_odm(struct dc *dc, struct dc_state *context, struct pipe_ctx *pipe_ctx);
74 void dcn32_update_dsc_on_stream(struct pipe_ctx *pipe_ctx, bool enable);
76 unsigned int dcn32_calculate_dccg_k1_k2_values(struct pipe_ctx *pipe_ctx, unsigned int *k1_div, uns…
84 struct pipe_ctx *top_pipe_to_program,
89 void dcn32_unblank_stream(struct pipe_ctx *pipe_ctx,
92 bool dcn32_is_dp_dig_pixel_rate_div_policy(struct pipe_ctx *pipe_ctx);
[all …]
/linux/drivers/gpu/drm/amd/display/dc/link/accessories/
H A Dlink_dp_cts.c69 struct pipe_ctx *pipes[MAX_PIPES]; in dp_retrain_link_dp_test()
195 struct pipe_ctx *pipes = link->dc->current_state->res_ctx.pipe_ctx; in dp_test_get_audio_test_data()
196 struct pipe_ctx *pipe_ctx = &pipes[0]; in dp_test_get_audio_test_data() local
268 for (modes = 0; modes < pipe_ctx->stream->audio_info.mode_count; modes++) { in dp_test_get_audio_test_data()
481 struct pipe_ctx *pipe_ctx, in set_crtc_test_pattern() argument
486 enum dc_color_depth color_depth = pipe_ctx-> in set_crtc_test_pattern()
489 struct output_pixel_processor *opp = pipe_ctx->stream_res.opp; in set_crtc_test_pattern()
490 struct pipe_ctx *odm_pipe; in set_crtc_test_pattern()
496 pipe_ctx); in set_crtc_test_pattern()
497 controller_test_pattern = pipe_ctx->stream_res.test_pattern_params.test_pattern; in set_crtc_test_pattern()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn32/
H A Ddcn32_resource_helpers.c41 struct pipe_ctx *pipe_ctx, in dcn32_helper_calculate_mall_bytes_for_cursor() argument
44 struct hubp *hubp = pipe_ctx->plane_res.hubp; in dcn32_helper_calculate_mall_bytes_for_cursor()
48 switch (pipe_ctx->stream->cursor_attributes.color_format) { in dcn32_helper_calculate_mall_bytes_for_cursor()
67 if (pipe_ctx->stream->cursor_position.enable && (ignore_cursor_buf || in dcn32_helper_calculate_mall_bytes_for_cursor()
114 struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; in dcn32_merge_pipes_for_subvp()
136 struct pipe_ctx *top_pipe = pipe->top_pipe; in dcn32_merge_pipes_for_subvp()
137 struct pipe_ctx *bottom_pipe = pipe->bottom_pipe; in dcn32_merge_pipes_for_subvp()
159 struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; in dcn32_all_pipes_have_stream_and_plane()
176 struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; in dcn32_subvp_in_use()
201 struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; in dcn32_any_surfaces_rotated()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/
H A Ddc_trace.h26 #define TRACE_DC_PIPE_STATE(pipe_ctx, index, max_pipes) \ argument
28 struct pipe_ctx *pipe_ctx = &dc->current_state->res_ctx.pipe_ctx[index]; \
29 if (pipe_ctx->plane_state) \
30 trace_amdgpu_dm_dc_pipe_state(pipe_ctx->pipe_idx, pipe_ctx->plane_state, \
31 pipe_ctx->stream, &pipe_ctx->plane_res, \
32 pipe_ctx->update_flags.raw); \
H A Ddc_spl_translate.h15 void translate_SPL_in_params_from_pipe_ctx(struct pipe_ctx *pipe_ctx, struct spl_in *spl_in);
21 void translate_SPL_out_params_to_pipe_ctx(struct pipe_ctx *pipe_ctx, struct spl_out *spl_out);
/linux/drivers/gpu/drm/amd/display/dc/virtual/
H A Dvirtual_link_hwss.h30 void virtual_setup_stream_encoder(struct pipe_ctx *pipe_ctx);
31 void virtual_setup_stream_attribute(struct pipe_ctx *pipe_ctx);
32 void virtual_reset_stream_encoder(struct pipe_ctx *pipe_ctx);
H A Dvirtual_link_hwss.c28 void virtual_setup_stream_encoder(struct pipe_ctx *pipe_ctx) in virtual_setup_stream_encoder() argument
32 void virtual_setup_stream_attribute(struct pipe_ctx *pipe_ctx) in virtual_setup_stream_attribute() argument
36 void virtual_reset_stream_encoder(struct pipe_ctx *pipe_ctx) in virtual_reset_stream_encoder() argument
/linux/drivers/gpu/drm/amd/display/dc/basics/
H A Ddc_common.h33 bool is_lower_pipe_tree_visible(struct pipe_ctx *pipe_ctx);
35 bool is_upper_pipe_tree_visible(struct pipe_ctx *pipe_ctx);
37 bool is_pipe_tree_visible(struct pipe_ctx *pipe_ctx);
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn314/
H A Ddcn314_hwseq.h34 void dcn314_update_odm(struct dc *dc, struct dc_state *context, struct pipe_ctx *pipe_ctx);
40 unsigned int dcn314_calculate_dccg_k1_k2_values(struct pipe_ctx *pipe_ctx, unsigned int *k1_div, un…
/linux/drivers/gpu/drm/amd/display/dc/dce/
H A Ddmub_replay.c124 struct pipe_ctx *pipe_ctx = NULL; in dmub_replay_copy_settings() local
130 res_ctx->pipe_ctx[i].stream && in dmub_replay_copy_settings()
131 res_ctx->pipe_ctx[i].stream->link && in dmub_replay_copy_settings()
132 res_ctx->pipe_ctx[i].stream->link == link && in dmub_replay_copy_settings()
133 res_ctx->pipe_ctx[i].stream->link->connector_signal == SIGNAL_TYPE_EDP) { in dmub_replay_copy_settings()
134 pipe_ctx = &res_ctx->pipe_ctx[i]; in dmub_replay_copy_settings()
140 if (!pipe_ctx) in dmub_replay_copy_settings()
153 if (pipe_ctx->plane_res.dpp) in dmub_replay_copy_settings()
154 copy_settings_data->dpp_inst = pipe_ctx->plane_res.dpp->inst; in dmub_replay_copy_settings()
157 if (pipe_ctx->stream_res.tg) in dmub_replay_copy_settings()
[all …]

12