Searched refs:physymclk (Results 1 – 10 of 10) sorted by relevance
458 if (dccg->ctx->dc->debug.root_clock_optimization.bits.physymclk) in dccg31_set_physymclk()465 if (dccg->ctx->dc->debug.root_clock_optimization.bits.physymclk) in dccg31_set_physymclk()475 if (dccg->ctx->dc->debug.root_clock_optimization.bits.physymclk) in dccg31_set_physymclk()482 if (dccg->ctx->dc->debug.root_clock_optimization.bits.physymclk) in dccg31_set_physymclk()492 if (dccg->ctx->dc->debug.root_clock_optimization.bits.physymclk) in dccg31_set_physymclk()499 if (dccg->ctx->dc->debug.root_clock_optimization.bits.physymclk) in dccg31_set_physymclk()509 if (dccg->ctx->dc->debug.root_clock_optimization.bits.physymclk) in dccg31_set_physymclk()516 if (dccg->ctx->dc->debug.root_clock_optimization.bits.physymclk) in dccg31_set_physymclk()526 if (dccg->ctx->dc->debug.root_clock_optimization.bits.physymclk) in dccg31_set_physymclk()533 if (dccg->ctx->dc->debug.root_clock_optimization.bits.physymclk) in dccg31_set_physymclk()[all …]
283 if (dccg->ctx->dc->debug.root_clock_optimization.bits.physymclk) in dccg401_set_physymclk()290 if (dccg->ctx->dc->debug.root_clock_optimization.bits.physymclk) in dccg401_set_physymclk()300 if (dccg->ctx->dc->debug.root_clock_optimization.bits.physymclk) in dccg401_set_physymclk()307 if (dccg->ctx->dc->debug.root_clock_optimization.bits.physymclk) in dccg401_set_physymclk()317 if (dccg->ctx->dc->debug.root_clock_optimization.bits.physymclk) in dccg401_set_physymclk()324 if (dccg->ctx->dc->debug.root_clock_optimization.bits.physymclk) in dccg401_set_physymclk()334 if (dccg->ctx->dc->debug.root_clock_optimization.bits.physymclk) in dccg401_set_physymclk()341 if (dccg->ctx->dc->debug.root_clock_optimization.bits.physymclk) in dccg401_set_physymclk()718 if (dccg->ctx->dc->debug.root_clock_optimization.bits.physymclk) { in dccg401_init()
309 if (dccg->ctx->dc->debug.root_clock_optimization.bits.physymclk) in dccg314_init()
241 if (!dccg->ctx->dc->debug.root_clock_optimization.bits.physymclk && enable) in dccg35_set_physymclk_rcg()1548 if (!dccg->ctx->dc->debug.root_clock_optimization.bits.physymclk) in dccg35_set_physymclk_root_clock_gating()
815 bool physymclk: 1; member
921 .physymclk = true,
747 .physymclk = false,
760 .physymclk = false,
740 .physymclk = false,
505 if (!hws->ctx->dc->debug.root_clock_optimization.bits.physymclk) in dcn35_physymclk_root_clock_control()