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Searched refs:phy_set_bits_mmd (Results 1 – 16 of 16) sorted by relevance

/linux/drivers/net/phy/mediatek/
H A Dmtk-ge-soc.c403 phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_AD_CALIN, in cal_cycle()
659 phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_ANA_CAL_RG0, in tx_vcm_cal_sw()
663 phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_ANA_CAL_RG1, in tx_vcm_cal_sw()
674 phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, in tx_vcm_cal_sw()
685 phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, in tx_vcm_cal_sw()
696 phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, in tx_vcm_cal_sw()
707 phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, in tx_vcm_cal_sw()
993 phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, in mt798x_phy_eee()
1021 phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_DEV1E_REG323, in mt798x_phy_eee()
1030 phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_DEV1E_REG326, in mt798x_phy_eee()
[all …]
/linux/drivers/net/phy/
H A Dphy-c45.c72 return phy_set_bits_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL1, in genphy_c45_pma_suspend()
348 return phy_set_bits_mmd(phydev, MDIO_MMD_AN, reg, in genphy_c45_restart_aneg()
397 ret = phy_set_bits_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL1, in genphy_c45_pma_soft_reset()
1395 ret = phy_set_bits_mmd(phydev, MDIO_MMD_AN, MDIO_AN_10GBT_CTRL, in genphy_c45_fast_retrain()
1400 ret = phy_set_bits_mmd(phydev, MDIO_MMD_AN, MDIO_AN_CTRL2, in genphy_c45_fast_retrain()
1406 return phy_set_bits_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_FSRT_CSR, in genphy_c45_fast_retrain()
1567 ret = phy_set_bits_mmd(phydev, MDIO_MMD_VEND2, in genphy_c45_plca_set_cfg()
1818 ret = phy_set_bits_mmd(phydev, MDIO_MMD_VEND2, MDIO_OATC14_HDD, in genphy_c45_oatc14_cable_test_start()
1827 return phy_set_bits_mmd(phydev, MDIO_MMD_VEND2, MDIO_OATC14_HDD, in genphy_c45_oatc14_cable_test_start()
H A Ddp83tg720.c336 ret = phy_set_bits_mmd(phydev, MDIO_MMD_VEND2, in dp83tg720_cable_test_start()
367 ret = phy_set_bits_mmd(phydev, MDIO_MMD_VEND2, DP83TG720S_TDR_CFG, in dp83tg720_cable_test_start()
H A Dmicrochip_t1.c1124 ret = phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, in lan887x_sgmii_init()
1140 ret = phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, LAN887X_MIS_CFG_REG0, in lan887x_sgmii_init()
1146 return phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, LAN887X_SGMII_PCS_CFG, in lan887x_sgmii_init()
1396 return phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, LAN887X_REG_REG26, in lan887x_100M_setup()
1413 return phy_set_bits_mmd(phydev, MDIO_MMD_PMAPMD, LAN887X_DSP_PMA_CONTROL, in lan887x_1000M_setup()
2082 rc = phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, in lan887x_get_sqi()
H A Dmarvell-88q2xxx.c605 return phy_set_bits_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL1, in mv88q2xxx_suspend()
830 ret = phy_set_bits_mmd(phydev, MDIO_MMD_PCS, in mv88q2xxx_config_init()
H A Ddp83tc811.c381 phy_set_bits_mmd(phydev, DP83811_DEVADDR, MII_DP83811_WOL_CFG, in dp83811_resume()
H A Dmicrochip_rds_ptp.c54 return phy_set_bits_mmd(phydev, PTP_MMD(clock), addr, val); in mchp_rds_phy_set_bits_mmd()
1098 return phy_set_bits_mmd(clock->phydev, PTP_MMD(clock), reg, in mchp_rds_ptp_top_config_intr()
H A Ddp83869.c514 return phy_set_bits_mmd(phydev, DP83869_DEVADDR, in dp83869_config_port_mirroring()
H A Das21xxx.c628 ret = phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, VEND1_PTP_CLK, in as21xxx_probe()
H A Dmicrel.c5667 ret = phy_set_bits_mmd(phydev, 2, LAN8841_GPIO_EN, BIT(pin)); in lan8841_ptp_perout_on()
5671 ret = phy_set_bits_mmd(phydev, 2, LAN8841_GPIO_DIR, BIT(pin)); in lan8841_ptp_perout_on()
5675 return phy_set_bits_mmd(phydev, 2, LAN8841_GPIO_BUF, BIT(pin)); in lan8841_ptp_perout_on()
5755 ret = phy_set_bits_mmd(phydev, 2, LAN8841_GPIO_DATA_SEL1, in lan8841_ptp_enable_event()
5758 ret = phy_set_bits_mmd(phydev, 2, LAN8841_GPIO_DATA_SEL2, in lan8841_ptp_enable_event()
5910 ret = phy_set_bits_mmd(phydev, 2, LAN8841_GPIO_EN, BIT(pin)); in lan8841_ptp_extts_on()
H A Dnxp-c45-tja11xx-macsec.c1608 ret = phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, VEND1_PORT_FUNC_ENABLES, in nxp_c45_macsec_config_init()
/linux/drivers/net/phy/qcom/
H A Dqca808x.c205 ret = phy_set_bits_mmd(phydev, MDIO_MMD_AN, in qca808x_config_init()
H A Dqcom-phy-lib.c710 return phy_set_bits_mmd(phydev, MDIO_MMD_AN, QCA808X_MMD7_CNT_CTRL, in qcom_phy_counter_config()
H A Dqca807x.c664 ret = phy_set_bits_mmd(phydev, in qca807x_configure_serdes()
/linux/include/linux/
H A Dphy.h1959 static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad, in phy_set_bits_mmd() function
/linux/drivers/net/phy/realtek/
H A Drealtek_main.c2390 return phy_set_bits_mmd(phydev, MDIO_MMD_VEND2, in rtl822xb_led_brightness_set()