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Searched refs:phy_read (Results 1 – 25 of 54) sorted by relevance

123

/linux/drivers/net/ethernet/ibm/emac/
H A Dphy.c32 #define phy_read _phy_read macro
60 val = phy_read(phy, MII_BMCR); in emac_mii_reset_phy()
68 val = phy_read(phy, MII_BMCR); in emac_mii_reset_phy()
120 ctl = phy_read(phy, MII_BMCR); in genmii_setup_aneg()
129 adv = phy_read(phy, MII_ADVERTISE); in genmii_setup_aneg()
150 adv = phy_read(phy, MII_CTRL1000); in genmii_setup_aneg()
162 ctl = phy_read(phy, MII_BMCR); in genmii_setup_aneg()
178 ctl = phy_read(phy, MII_BMCR); in genmii_setup_forced()
211 phy_read(phy, MII_BMSR); in genmii_poll_link()
212 status = phy_read(phy, MII_BMSR); in genmii_poll_link()
[all …]
/linux/drivers/net/phy/
H A Ddp83tc811.c82 err = phy_read(phydev, MII_DP83811_INT_STAT1); in dp83811_ack_interrupt()
86 err = phy_read(phydev, MII_DP83811_INT_STAT2); in dp83811_ack_interrupt()
90 err = phy_read(phydev, MII_DP83811_INT_STAT3); in dp83811_ack_interrupt()
143 phy_read(phydev, MII_DP83811_INT_STAT1); in dp83811_set_wol()
204 misr_status = phy_read(phydev, MII_DP83811_INT_STAT1); in dp83811_config_intr()
221 misr_status = phy_read(phydev, MII_DP83811_INT_STAT2); in dp83811_config_intr()
236 misr_status = phy_read(phydev, MII_DP83811_INT_STAT3); in dp83811_config_intr()
277 irq_status = phy_read(phydev, MII_DP83811_INT_STAT1); in dp83811_handle_interrupt()
285 irq_status = phy_read(phydev, MII_DP83811_INT_STAT2); in dp83811_handle_interrupt()
293 irq_status = phy_read(phydev, MII_DP83811_INT_STAT3); in dp83811_handle_interrupt()
[all …]
H A Dnxp-tja11xx.c150 ret = phy_read(phydev, MII_ECTRL); in tja11xx_wakeup()
365 ret = phy_read(phydev, MII_INTSRC); in tja11xx_config_init()
383 ret = phy_read(phydev, MII_CFG1); in tja11xx_read_status()
393 ret = phy_read(phydev, MII_COMMSTAT); in tja11xx_read_status()
408 ret = phy_read(phydev, MII_COMMSTAT); in tja11xx_get_sqi()
439 ret = phy_read(phydev, tja11xx_hw_stats[i].reg); in tja11xx_get_stats()
457 ret = phy_read(phydev, MII_INTSRC); in tja11xx_hwmon_read()
466 ret = phy_read(phydev, MII_INTSRC); in tja11xx_hwmon_read()
649 ret = phy_read(phydev, MII_PHYSID2); in tja1102_match_phy_device()
678 ret = phy_read(phydev, MII_INTSRC); in tja11xx_ack_interrupt()
[all …]
H A Dbroadcom.c118 val = phy_read(phydev, MII_CTRL1000); in bcm54210e_config_init()
462 reg = phy_read(phydev, MII_BCM54XX_ECR); in bcm54xx_config_init()
708 val = phy_read(phydev, MII_BCM54XX_LRESR); in bcm5481x_read_abilities()
902 err = phy_read(phydev, MII_BMCR); in brcm_fet_config_init()
907 reg = phy_read(phydev, MII_BRCM_FET_INTREG); in brcm_fet_config_init()
927 brcmtest = phy_read(phydev, MII_BRCM_FET_BRCMTEST); in brcm_fet_config_init()
984 reg = phy_read(phydev, MII_BRCM_FET_INTREG); in brcm_fet_ack_interrupt()
995 reg = phy_read(phydev, MII_BRCM_FET_INTREG); in brcm_fet_config_intr()
1022 irq_status = phy_read(phydev, MII_BRCM_FET_INTREG); in brcm_fet_handle_interrupt()
1048 brcmtest = phy_read(phydev, MII_BRCM_FET_BRCMTEST); in brcm_fet_suspend()
[all …]
H A Dsmsc.c61 int rc = phy_read(phydev, MII_LAN83C185_ISF); in smsc_phy_ack_interrupt()
105 irq_status = phy_read(phydev, MII_LAN83C185_ISF); in smsc_phy_handle_interrupt()
139 int rc = phy_read(phydev, MII_LAN83C185_SPECIAL_MODES); in smsc_phy_reset()
196 rc = phy_read(phydev, SPECIAL_CTRL_STS); in lan87xx_config_aneg()
250 rc = phy_read(phydev, MII_LAN83C185_CTRL_STATUS); in lan87xx_read_status()
262 read_poll_timeout(phy_read, rc, in lan87xx_read_status()
270 rc = phy_read(phydev, MII_LAN83C185_CTRL_STATUS); in lan87xx_read_status()
567 val = phy_read(phydev, stat.reg); in smsc_get_stat()
H A Ddp83869.c194 int err = phy_read(phydev, MII_DP83869_ISR); in dp83869_ack_interrupt()
211 micr_status = phy_read(phydev, MII_DP83869_MICR); in dp83869_config_intr()
239 irq_status = phy_read(phydev, MII_DP83869_ISR); in dp83869_handle_interrupt()
245 irq_enabled = phy_read(phydev, MII_DP83869_MICR); in dp83869_handle_interrupt()
271 val_micr = phy_read(phydev, MII_DP83869_MICR); in dp83869_set_wol()
420 val = phy_read(phydev, DP83869_CFG2); in dp83869_get_downshift()
627 val = phy_read(phydev, MII_DP83869_PHYCTRL); in dp83869_configure_rgmii()
672 bmcr = phy_read(phydev, MII_BMCR); in dp83869_configure_fiber()
821 val = phy_read(phydev, DP83869_CFG4); in dp83869_config_init()
H A Ddp83867.c203 int err = phy_read(phydev, MII_DP83867_ISR); in dp83867_ack_interrupt()
219 val_micr = phy_read(phydev, MII_DP83867_MICR); in dp83867_set_wol()
329 micr_status = phy_read(phydev, MII_DP83867_MICR); in dp83867_config_intr()
358 irq_status = phy_read(phydev, MII_DP83867_ISR); in dp83867_handle_interrupt()
364 irq_enabled = phy_read(phydev, MII_DP83867_MICR); in dp83867_handle_interrupt()
380 int status = phy_read(phydev, MII_DP83867_PHYSTS); in dp83867_read_status()
425 val = phy_read(phydev, DP83867_CFG2); in dp83867_get_downshift()
774 val = phy_read(phydev, MII_DP83867_PHYCTRL); in dp83867_config_init()
872 val = phy_read(phydev, DP83867_CFG3); in dp83867_config_init()
1091 val = phy_read(phydev, DP83867_LEDCR1); in dp83867_led_hw_control_get()
H A Dbcm-phy-lib.c113 return phy_read(phydev, MII_BCM54XX_AUX_CTL); in bcm54xx_auxctl_read()
134 tmp = phy_read(phydev, MII_BCM54XX_AUX_CTL); in bcm_phy_write_misc()
158 tmp = phy_read(phydev, MII_BCM54XX_AUX_CTL); in bcm_phy_read_misc()
176 reg = phy_read(phydev, MII_BCM54XX_ISR); in bcm_phy_ack_intr()
188 reg = phy_read(phydev, MII_BCM54XX_ECR); in bcm_phy_config_intr()
215 irq_status = phy_read(phydev, MII_BCM54XX_ISR); in bcm_phy_handle_interrupt()
226 irq_mask = phy_read(phydev, MII_BCM54XX_IMR); in bcm_phy_handle_interrupt()
245 return MII_BCM54XX_SHD_DATA(phy_read(phydev, MII_BCM54XX_SHD)); in bcm_phy_read_shadow()
541 val = phy_read(phydev, stat.reg); in bcm_phy_get_stat()
H A Dintel-xway.c205 val = phy_read(phydev, XWAY_MDIO_MIICTRL); in xway_gphy_rgmii_init()
310 phy_read(phydev, XWAY_MDIO_ISTAT); in xway_gphy_config_init()
362 reg = phy_read(phydev, MII_CTRL1000); in xway_gphy14_config_aneg()
375 reg = phy_read(phydev, XWAY_MDIO_ISTAT); in xway_gphy_ack_interrupt()
406 irq_status = phy_read(phydev, XWAY_MDIO_ISTAT); in xway_gphy_handle_interrupt()
592 ret = phy_read(phydev, XWAY_MDIO_ERRCNT); in xway_gphy_update_stats()
H A Dmicrel.c565 return phy_read(phydev, MII_KSZPHY_EXTREG_READ); in kszphy_extended_read()
573 rc = phy_read(phydev, MII_KSZPHY_INTCS); in kszphy_ack_interrupt()
590 temp = phy_read(phydev, MII_KSZPHY_CTRL); in kszphy_config_intr()
618 irq_status = phy_read(phydev, MII_KSZPHY_INTCS); in kszphy_handle_interrupt()
636 ctrl = phy_read(phydev, MII_KSZPHY_CTRL); in kszphy_rmii_clk_sel()
663 temp = phy_read(phydev, reg); in kszphy_setup_led()
686 ret = phy_read(phydev, MII_KSZPHY_OMSO); in kszphy_broadcast_disable()
702 ret = phy_read(phydev, MII_KSZPHY_OMSO); in kszphy_nand_tree_disable()
806 ret = phy_read(phydev, MII_BMSR); in ksz8051_ksz8795_match_phy_device()
885 ret = phy_read(phydev, MII_KSZPHY_CTRL_2); in ksz8081_mdix_update()
[all …]
H A Dmicrochip_t1.c342 rc = phy_read(phydev, LAN87XX_EXT_REG_CTL); in lan937x_dsp_workaround()
378 rc = phy_read(phydev, offset); in access_ereg()
405 rc = phy_read(phydev, LAN87XX_EXT_REG_RD_DATA); in access_ereg()
699 rc = phy_read(phydev, LAN87XX_INTERRUPT_SOURCE); in lan87xx_phy_config_intr()
730 rc = phy_read(phydev, LAN87XX_INTERRUPT_SOURCE); in lan87xx_phy_config_intr()
760 irq_status = phy_read(phydev, LAN87XX_INTERRUPT_SOURCE); in lan87xx_handle_interrupt()
788 bmcr = phy_read(phydev, MII_BMCR); in microchip_cable_test_start_common()
792 bmsr = phy_read(phydev, MII_BMSR); in microchip_cable_test_start_common()
1013 rc = phy_read(phydev, T1_MODE_STAT_REG); in lan87xx_read_status()
1515 val = phy_read(phydev, stat.reg); in lan887x_get_stat()
H A Dphy_device.c2099 bmsr = phy_read(phydev, MII_BMSR); in genphy_config_advert()
2219 val = phy_read(phydev, MII_CTRL1000); in genphy_read_master_slave()
2235 val = phy_read(phydev, MII_STAT1000); in genphy_read_master_slave()
2285 ret = phy_read(phydev, MII_BMCR); in genphy_check_and_restart_aneg()
2386 int ctl = phy_read(phydev, MII_BMCR); in genphy_c37_config_aneg()
2415 int retval = phy_read(phydev, MII_BMSR); in genphy_aneg_done()
2433 bmcr = phy_read(phydev, MII_BMCR); in genphy_update_link()
2449 status = phy_read(phydev, MII_BMSR); in genphy_update_link()
2457 status = phy_read(phydev, MII_BMSR); in genphy_update_link()
2487 lpagb = phy_read(phydev, MII_STAT1000); in genphy_read_lpa()
[all …]
H A Ddp83640.c230 val = phy_read(phydev, regnum); in ext_read()
605 val = phy_read(phydev, PHYCR2); in enable_broadcast()
1031 int err = phy_read(phydev, MII_DP83640_MISR); in dp83640_ack_interrupt()
1050 misr = phy_read(phydev, MII_DP83640_MISR); in dp83640_config_intr()
1062 micr = phy_read(phydev, MII_DP83640_MICR); in dp83640_config_intr()
1070 micr = phy_read(phydev, MII_DP83640_MICR); in dp83640_config_intr()
1080 misr = phy_read(phydev, MII_DP83640_MISR); in dp83640_config_intr()
1100 irq_status = phy_read(phydev, MII_DP83640_MISR); in dp83640_handle_interrupt()
H A Dbcm7xxx.c164 phy_read(phydev, MII_BMSR); in bcm7xxx_28nm_config_init()
401 phy_read(phydev, MII_BMSR); in bcm7xxx_28nm_ephy_config_init()
706 phy_read(phydev, MII_BCM7XXX_AUX_MODE); in bcm7xxx_config_init()
849 phy_read(phydev, MII_BMSR); in bcm7xxx_28nm_probe()
H A Dmarvell.c379 err = phy_read(phydev, MII_M1011_IEVENT); in marvell_ack_interrupt()
414 irq_status = phy_read(phydev, MII_M1011_IEVENT); in marvell_handle_interrupt()
764 int extsr = phy_read(phydev, MII_M1111_PHY_EXT_SR); in m88e1111_config_aneg()
945 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR); in m88e1111_config_init_rgmii()
1002 int extsr = phy_read(phydev, MII_M1111_PHY_EXT_SR); in m88e1111_config_init_1000basex()
1078 val = phy_read(phydev, MII_M1111_PHY_EXT_CR); in m88e1111_get_downshift()
1142 val = phy_read(phydev, MII_M1011_PHY_SCR); in m88e1011_get_downshift()
1520 val = phy_read(phydev, MII_88E1540_COPPER_CTRL3); in m88e1540_get_fld()
1701 lpa = phy_read(phydev, MII_LPA); in marvell_read_status_page_an()
1739 status = phy_read(phydev, MII_M1011_PHY_STATUS); in marvell_read_status_page()
[all …]
/linux/arch/powerpc/platforms/85xx/
H A Dmpc85xx_mds.c62 scr = phy_read(phydev, MV88E1111_SCR); in mpc8568_fixup_125_clock()
77 scr = phy_read(phydev, MV88E1111_SCR); in mpc8568_fixup_125_clock()
98 temp = phy_read(phydev, 30); in mpc8568_mds_phy_fixups()
114 temp = phy_read(phydev, 30); in mpc8568_mds_phy_fixups()
119 temp = phy_read(phydev, 30); in mpc8568_mds_phy_fixups()
132 temp = phy_read(phydev, 16); in mpc8568_mds_phy_fixups()
/linux/drivers/net/phy/qcom/
H A Dqcom-phy-lib.c25 return phy_read(phydev, AT803X_DEBUG_DATA); in at803x_debug_reg_read()
98 ret = phy_read(phydev, AT803X_INTR_STATUS); in at803x_set_wol()
106 irq_enabled = phy_read(phydev, AT803X_INTR_ENABLE); in at803x_set_wol()
151 value = phy_read(phydev, AT803X_INTR_ENABLE); in at803x_get_wol()
164 err = phy_read(phydev, AT803X_INTR_STATUS); in at803x_ack_interrupt()
175 value = phy_read(phydev, AT803X_INTR_ENABLE); in at803x_config_intr()
207 irq_status = phy_read(phydev, AT803X_INTR_STATUS); in at803x_handle_interrupt()
214 int_enabled = phy_read(phydev, AT803X_INTR_ENABLE); in at803x_handle_interrupt()
239 ss = phy_read(phydev, AT803X_SPECIFIC_STATUS); in at803x_read_specific_status()
246 sfc = phy_read(phydev, AT803X_SPECIFIC_FUNCTION_CONTROL); in at803x_read_specific_status()
[all …]
H A Dat803x.c241 context->bmcr = phy_read(phydev, MII_BMCR); in at803x_context_save()
242 context->advertise = phy_read(phydev, MII_ADVERTISE); in at803x_context_save()
243 context->control1000 = phy_read(phydev, MII_CTRL1000); in at803x_context_save()
244 context->int_enable = phy_read(phydev, AT803X_INTR_ENABLE); in at803x_context_save()
245 context->smart_speed = phy_read(phydev, AT803X_SMART_SPEED); in at803x_context_save()
246 context->led_control = phy_read(phydev, AT803X_LED_CONTROL); in at803x_context_save()
266 value = phy_read(phydev, AT803X_INTR_ENABLE); in at803x_suspend()
622 val = phy_read(phydev, AT803X_CDT_STATUS); in at803x_cable_test_one_pair()
854 ccr = phy_read(phydev, AT803X_REG_CHIP_CONFIG); in at8031_probe()
/linux/drivers/net/ethernet/realtek/
H A Dr8169_firmware.h22 rtl_fw_read_t phy_read; member
/linux/include/linux/dsa/
H A Dlan9303.h8 int (*phy_read)(struct lan9303 *chip, int addr, int regnum); member
/linux/drivers/net/phy/realtek/
H A Drealtek_main.c773 err = phy_read(phydev, RTL8201F_ISR); in rtl8201_ack_interrupt()
782 err = phy_read(phydev, RTL821x_INSR); in rtl821x_ack_interrupt()
791 err = phy_read(phydev, RTL8211F_INSR); in rtl8211f_ack_interrupt()
897 irq_status = phy_read(phydev, RTL8201F_ISR); in rtl8201_handle_interrupt()
915 irq_status = phy_read(phydev, RTL821x_INSR); in rtl821x_handle_interrupt()
921 irq_enabled = phy_read(phydev, RTL821x_INER); in rtl821x_handle_interrupt()
939 irq_status = phy_read(phydev, RTL8211F_INSR); in rtl8211f_handle_interrupt()
1338 phy_read(phydev, RTL8211F_INSR); in rtl8211f_suspend()
1725 val = phy_read(phydev, RTL_PHYSR); in rtlgen_read_status()
2772 val = phy_read(phydev, 0x13); in rtlgen_supports_2_5gbps()
[all …]
/linux/drivers/net/dsa/mv88e6xxx/
H A Dphy.c37 if (!chip->info->ops->phy_read) in mv88e6xxx_phy_read()
40 return chip->info->ops->phy_read(chip, bus, addr, reg, val); in mv88e6xxx_phy_read()
H A Dchip.c3773 if (!chip->info->ops->phy_read) in mv88e6xxx_mdio_read()
3777 err = chip->info->ops->phy_read(chip, bus, phy, reg, &val); in mv88e6xxx_mdio_read()
4241 .phy_read = mv88e6185_phy_ppu_read,
4285 .phy_read = mv88e6185_phy_ppu_read,
4318 .phy_read = mv88e6xxx_g2_smi_phy_read_c22,
4365 .phy_read = mv88e6xxx_g2_smi_phy_read_c22,
4405 .phy_read = mv88e6185_phy_ppu_read,
4448 .phy_read = mv88e6xxx_g2_smi_phy_read_c22,
4508 .phy_read = mv88e6xxx_g2_smi_phy_read_c22,
4556 .phy_read = mv88e6165_phy_read,
[all …]
/linux/drivers/net/dsa/
H A Dlan9303_mdio.c77 .phy_read = lan9303_mdio_phy_read,
H A Dlan9303-core.c382 .phy_read = lan9303_indirect_phy_read,
504 reg = chip->ops->phy_read(chip, 3, MII_LAN911X_SPECIAL_MODES); in lan9303_detect_phy_setup()
1089 return chip->ops->phy_read(chip, phy_base + port, regnum); in lan9303_phy_read()
1386 .phy_read = lan9303_phy_read,

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