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Searched refs:phy_control (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/usb/phy/
H A Dphy-am335x-control.h5 struct phy_control { struct
6 void (*phy_power)(struct phy_control *phy_ctrl, u32 id, argument
8 void (*phy_wkup)(struct phy_control *phy_ctrl, u32 id, bool on); argument
11 static inline void phy_ctrl_power(struct phy_control *phy_ctrl, u32 id, in phy_ctrl_power()
17 static inline void phy_ctrl_wkup(struct phy_control *phy_ctrl, u32 id, bool on) in phy_ctrl_wkup()
22 struct phy_control *am335x_get_phy_control(struct device *dev);
H A Dphy-am335x-control.c16 struct phy_control phy_ctrl;
31 static void am335x_phy_wkup(struct phy_control *phy_ctrl, u32 id, bool on) in am335x_phy_wkup()
63 static void am335x_phy_power(struct phy_control *phy_ctrl, u32 id, in am335x_phy_power()
109 static const struct phy_control ctrl_am335x = {
128 struct phy_control *am335x_get_phy_control(struct device *dev) in am335x_get_phy_control()
154 const struct phy_control *phy_ctrl; in am335x_control_usb_probe()
/linux/drivers/gpu/drm/i915/display/
H A Dintel_display_power_well.c1337 u32 phy_control = display->power.chv_phy_control; in assert_chv_phy_status() local
1365 if ((phy_control & PHY_CH_POWER_DOWN_OVRD_EN(DPIO_PHY0, DPIO_CH0)) == 0) in assert_chv_phy_status()
1366 phy_control |= PHY_CH_POWER_DOWN_OVRD(0xf, DPIO_PHY0, DPIO_CH0); in assert_chv_phy_status()
1368 if ((phy_control & PHY_CH_POWER_DOWN_OVRD_EN(DPIO_PHY0, DPIO_CH1)) == 0) in assert_chv_phy_status()
1369 phy_control |= PHY_CH_POWER_DOWN_OVRD(0xf, DPIO_PHY0, DPIO_CH1); in assert_chv_phy_status()
1372 if (BITS_SET(phy_control, in assert_chv_phy_status()
1382 if (BITS_SET(phy_control, in assert_chv_phy_status()
1387 if (BITS_SET(phy_control, in assert_chv_phy_status()
1390 if (BITS_SET(phy_control, in assert_chv_phy_status()
1394 if (BITS_SET(phy_control, in assert_chv_phy_status()
[all …]
/linux/drivers/scsi/isci/
H A Dphy.c571 u32 phy_control; in sci_phy_start_sas_link_training() local
573 phy_control = readl(&iphy->link_layer_registers->phy_configuration); in sci_phy_start_sas_link_training()
574 phy_control |= SCU_SAS_PCFG_GEN_BIT(SATA_SPINUP_HOLD); in sci_phy_start_sas_link_training()
575 writel(phy_control, in sci_phy_start_sas_link_training()
H A Dregisters.h1367 u32 phy_control; member
/linux/drivers/net/wireless/ath/carl9170/
H A Dwlan.h288 __le32 phy_control; member
H A Ddebug.c291 le16_to_cpu(txc->f.mac_control), le32_to_cpu(txc->f.phy_control), in carl9170_debugfs_format_frame()
H A Dtx.c927 txc->f.phy_control = phy_set; in carl9170_tx_apply_rateset()
/linux/drivers/net/ethernet/broadcom/
H A Dtg3.c1354 u32 phy_control; in tg3_bmcr_reset() local
1360 phy_control = BMCR_RESET; in tg3_bmcr_reset()
1361 err = tg3_writephy(tp, MII_BMCR, phy_control); in tg3_bmcr_reset()
1367 err = tg3_readphy(tp, MII_BMCR, &phy_control); in tg3_bmcr_reset()
1371 if ((phy_control & BMCR_RESET) == 0) { in tg3_bmcr_reset()