Searched refs:pgshift (Results 1 – 9 of 9) sorted by relevance
42 unsigned long pgshift; member133 return (iova >> bitmap->mapped.pgshift) / in iova_bitmap_offset_to_index()143 unsigned long pgshift = bitmap->mapped.pgshift; in iova_bitmap_index_to_offset() local145 return (index * BITS_PER_TYPE(*bitmap->bitmap)) << pgshift; in iova_bitmap_index_to_offset()255 mapped->pgshift = __ffs(page_size); in iova_bitmap_alloc()420 mapped->pgshift) + mapped->pgoff * BITS_PER_BYTE; in iova_bitmap_set()422 mapped->pgshift) + mapped->pgoff * BITS_PER_BYTE; in iova_bitmap_set()433 ((last_bit - cur_bit + 1) << mapped->pgshift); in iova_bitmap_set()
134 tdev->iommu.pgshift = PAGE_SHIFT; in nvkm_device_tegra_probe_iommu()136 tdev->iommu.pgshift = fls(pgsize_bitmap & ~PAGE_MASK); in nvkm_device_tegra_probe_iommu()137 if (tdev->iommu.pgshift == 0) { in nvkm_device_tegra_probe_iommu()141 tdev->iommu.pgshift -= 1; in nvkm_device_tegra_probe_iommu()150 tdev->iommu.pgshift, 1); in nvkm_device_tegra_probe_iommu()165 tdev->iommu.pgshift = 0; in nvkm_device_tegra_probe_iommu()
39 switch (BIT(wi->pgshift)) { in has_52bit_pa()65 return desc & GENMASK_ULL(47, wi->pgshift); in desc_to_oa()67 switch (BIT(wi->pgshift)) { in desc_to_oa()70 addr = desc & GENMASK_ULL(49, wi->pgshift); in desc_to_oa()75 addr = desc & GENMASK_ULL(47, wi->pgshift); in desc_to_oa()184 wi->pgshift = 12; break; in setup_s1_walk()186 wi->pgshift = 14; break; in setup_s1_walk()189 wi->pgshift = 16; break; in setup_s1_walk()197 wi->pgshift = 12; break; in setup_s1_walk()199 wi->pgshift = 14; break; in setup_s1_walk()[all …]
129 unsigned int pgshift; member163 switch (BIT(wi->pgshift)) { in check_base_s2_limits()183 start_size = input_size - ((3 - level) * stride + wi->pgshift); in check_base_s2_limits()254 switch (BIT(wi->pgshift)) { in walk_nested_s2_pgd()267 stride = wi->pgshift - 3; in walk_nested_s2_pgd()279 wi->pgshift); in walk_nested_s2_pgd()293 addr_bottom = (3 - level) * stride + wi->pgshift; in walk_nested_s2_pgd()332 base_addr = desc & GENMASK_ULL(47, wi->pgshift); in walk_nested_s2_pgd()373 out->block_size = 1UL << ((3 - level) * stride + wi->pgshift); in walk_nested_s2_pgd()387 wi->pgshift = 12; break; in vtcr_to_walk_info()[all …]
255 switch (BIT((wi)->pgshift)) { \344 unsigned int pgshift; member
52 return nvidia_smmu->bases[inst] + (page << smmu->pgshift); in nvidia_smmu_page()
1850 smmu->pgshift = (id & ARM_SMMU_ID1_PAGESIZE) ? 16 : 12; in arm_smmu_device_cfg_probe()1854 if (smmu->numpage != 2 * size << smmu->pgshift) in arm_smmu_device_cfg_probe()1857 2 * size << smmu->pgshift, smmu->numpage); in arm_smmu_device_cfg_probe()
327 uint pgshift; /* bits number in page size */ member662 ns->geom.pgshift = chip->page_shift; in ns_init()752 printk("bits in page size: %u\n", ns->geom.pgshift); in ns_init()1634 erase_block_no = ns->regs.row >> (ns->geom.secshift - ns->geom.pgshift); in ns_do_state_action()
595 imem->iommu_pgshift = tdev->iommu.pgshift; in gk20a_instmem_new()